MPC870CZT66 Freescale Semiconductor, MPC870CZT66 Datasheet - Page 4

• Manufacturer Part Number: MPC870CZT66
• Description: IC MPU POWERQUICC 66MHZ 256PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC870CZT66

• Processor Type: MPC8xx PowerQUICC 32-Bit
• Speed: 66MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 256-PBGA
• Family Name: MPC8xx
• Device Core: PowerQUICC
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

Features
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— Message digest execution unit (MDEU)
— Master/slave logic, with DMA
— Crypto-channel supporting multi-command descriptors
Interrupts
— Six external interrupt request (IRQ) lines
— Twelve port pins with interrupt capability
— Twenty-three internal interrupt sources
— Programmable priority between SCCs
— Programmable highest priority request
Communications processor module (CPM)
— RISC controller
— Communication-specific commands (for example,
— Supports continuous mode transmission and reception on all serial channels
— 8-Kbytes of dual-port RAM
— Several serial DMA (SDMA) channels to support the CPM
— Three parallel I/O registers with open-drain capability
On-chip 16 × 16 multiply accumulate controller (MAC)
— One operation per clock (two-clock latency, one-clock blockage)
— MAC operates concurrently with other instructions
— FIR loop—Four clocks per four multiplies
Four baud-rate generators
— Independent (can be connected to SCC or SMC)
— Allows changes during operation
— Autobaud support option
SCC (serial communication controller)
— Ethernet/IEEE 802.3® standard, supporting full 10-Mbps operation
— HDLC/SDLC
– ECB, CBC, and counter modes
– 128-, 192-, and 256-bit key lengths
– SHA with 160- or 256-bit message digest
– MD5 with 128-bit message digest
– HMAC with either algorithm
– 32-bit address/32-bit data
– Operation at MPC8xx bus frequency
– Integrated controller managing crypto-execution units
– Buffer size of 256 bytes for each execution unit, with flow control for large data sizes
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