MPC850DEVR50BU Freescale Semiconductor, MPC850DEVR50BU Datasheet - Page 29

IC MPU PWRQUICC 50MHZ 256-PBGA

MPC850DEVR50BU

Manufacturer Part Number
MPC850DEVR50BU
Description
IC MPU PWRQUICC 50MHZ 256-PBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC Ir
Datasheets

Specifications of MPC850DEVR50BU

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
256-PBGA
Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
50MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Operating Supply Voltage (min)
3.135V
Operating Temp Range
0C to 95C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
BGA
Core Size
32 Bit
Program Memory Size
3KB
Cpu Speed
50MHz
Embedded Interface Type
I2C, RS232, SPI, TDM, USB, UTOPIA
Digital Ic Case Style
BGA
No. Of Pins
256
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC850DEVR50BU
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC850DEVR50BUR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Figure 17
Figure 18
Freescale Semiconductor
GPL_A[0–5],
GPL_B[0–5]
BS_A[0:3],
GPL_A[0–5],
BS_B[0:3]
GPL_B[0–5]
MPC850 PowerQUICC™ Integrated Communications Processor Hardware Specifications, Rev. 2
CLKOUT
provides the timing for the asynchronous asserted UPWAIT signal controlled by the UPM.
Figure 17. Asynchronous UPWAIT Asserted Detection in UPM Handled Cycles Timing
provides the timing for the asynchronous negated UPWAIT signal controlled by the UPM.
UPWAIT
Figure 18. Asynchronous UPWAIT Negated Detection in UPM Handled Cycles Timing
BS_A[0:3],
BS_B[0:3]
CLKOUT
UPWAIT
CSx
CSx
B37
B37
B38
B38
Bus Signal Timing
29

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