CS80C286-16 Intersil, CS80C286-16 Datasheet - Page 15

• Manufacturer Part Number: CS80C286-16
• Description: IC CPU 16BIT 5V 16MHZ 68-PLCC
• Manufacturer: Intersil

Specifications of CS80C286-16

• Processor Type: 80C286 16-Bit
• Speed: 16MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

80C286 Real Address Mode
The 80C286 executes a fully upward-compatible superset of
the 80C86 instruction set in real address mode. In real
address mode the 80C286 is object code compatible with
80C86 and 80C88 software. The real address mode archi-
tecture (registers and addressing modes) is exactly as
described in the 80C286 Base Architecture section of this
Functional Description.
Memory Size
Physical memory is a contiguous array of up to 1,048,576
bytes (one megabyte) addressed by pins A
and BHE. A
Memory Addressing
In real address mode physical memory is a contiguous array
of up to 1,048,576 bytes (one megabyte) addressed by pin
A
always be zero in real mode. A
the system while the 80C286 is operating in Real Mode.
The selector portion of a pointer is interpreted as the upper
16-bits of a 20-bit segment address. The lower four bits of
the 20-bit segment address are always zero. Segment
addresses, therefore, begin on multiples of 16 bytes. See
Figure 6 for a graphic representation of address information.
All segments in real address mode are 64K bytes in size and
may be read, written, or executed. An exception or interrupt
can occur if data operands or instructions attempt to wrap
around the end of a segment (e.g. a word with its low order
byte at offset FFFF(H) and its high order byte at offset
0000(H)). If, in real address mode, the information contained
Interrupt table limit too small exception
Processor extension segment overrun
interrupt
Segment overrun exception
0
through A
TS
0
0
1
0
1
20
FUNCTION
19
through A
MP
and BHE. Address bits A
0
0
0
1
1
TABLE 8. RECOMMENDED MSW ENCODINGS FOR PROCESSOR EXTENSION CONTROL
23
should be ignored.
EM
0
1
1
0
0
20
TABLE 9. REAL ADDRESS MODE ADDRESSING INTERRUPTS
-A
23
Initial encoding after RESET. 80C286 operation is identical to 80C86/88.
No processor extension is available. Software will emulate its function.
No processor extension is available. Software will emulate its function. The
current processor extension context may belong to another task.
A processor extension exists.
A processor extension exists. The current processor extension context may
belong to another task. The exception 7 on WAIT allows software to test for
an error pending from a previous processor extension operation.
should not be used by
INTERRUPT
NUMBER
13
8
9
20
0
-A
through A
23
may not
INT vector is not within table limit
ESC with memory operand extending beyond offset
FFFF(H)
Word memory reference with offset = FFFF(H) or an
attempt to execute past the end of a segment
80C286
19
RECOMMENDED USE
15
RELATED INSTRUCTIONS
in a segment does not use the full 64K bytes, the unused
end of the segment may be overlaid by another segment to
reduce physical memory requirements.
FIGURE 6. 80C286 REAL ADDRESS MODE ADDRESS
CALCULATION
15
19
0000
SELECTOR
SEGMENT
MEMORY ADDRESS
15
20-BIT PHYSICAL
ADDER
OFFSET
0
0000
BEFORE INSTRUCTION
0
RETURN ADDRESS
0
SEGMENT
ADDRESS
OFFSET
ADDRESS
INSTRUCTION
EXCEPTION 7
ESC or WAIT
CAUSING
Yes
Yes
No
None
None
ESC
ESC