MPC8347CVRAGDB Freescale Semiconductor, MPC8347CVRAGDB Datasheet - Page 53

• Manufacturer Part Number: MPC8347CVRAGDB
• Description: IC MPU POWERQUICC II 620-PBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8347CVRAGDB

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 400MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 620-PBGA
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 400MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: BGA
• No. Of Pins: 672
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Figure 37
generally reference the rising edge of the clock, these AC timing diagrams also apply when the falling edge
is the active edge.
Figure 37
Figure 38
18 Package and Pin Listings
This section details package parameters, pin assignments, and dimensions. The MPC8347EA is available
in two packages—a tape ball grid array (TBGA) and a plastic ball grid array (PBGA). See
“Package Parameters for the MPC8347EA TBGA,” Section 18.2, “Mechanical Dimensions for the
MPC8347EA TBGA,” Section 18.3, “Package Parameters for the MPC8347EA PBGA,”
Section 18.4, “Mechanical Dimensions for the MPC8347EA PBGA.”
18.1
The package parameters are provided in the following list. The package type is 35 mm × 35 mm, 672 tape
ball grid array (TBGA).
Freescale Semiconductor
Package outline
Interconnects
Note: The clock edge is selectable on SPI.
Note: The clock edge is selectable on SPI.
SPICLK (Output)
Package Parameters for the MPC8347EA TBGA
and
shows the SPI timings in slave mode (external clock).
Output Signals:
shows the SPI timings in master mode (internal clock).
SPICLK (Input)
Output Signals:
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 11
Input Signals:
Input Signals:
(See Note)
(See Note)
Figure 38
(See Note)
(See Note)
SPIMOSI
SPIMISO
SPIMISO
SPIMOSI
Figure 38. SPI AC Timing in Master Mode (Internal Clock) Diagram
Figure 37. SPI AC Timing in Slave Mode (External Clock) Diagram
represent the AC timings from
t
NEIVKH
t
NIIVKH
t
NIKHOX
672
35 mm × 35 mm
t
NIIXKH
t
NEKHOX
t
NEIXKH
Table
54. Note that although the specifications
Package and Pin Listings
and
Section 18.1,
53