MPC8347ZUAJFB Freescale Semiconductor, MPC8347ZUAJFB Datasheet - Page 96

• Manufacturer Part Number: MPC8347ZUAJFB
• Description: IC MPU PWRQUICC II 672-TBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8347ZUAJFB

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 533MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 672-TBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Document Revision History
96
Revision
8
7
6
5
4
3
2
MPC8347E PowerQUICC™ II Pro Integrated Host Processor Hardware Specifications, Rev. 11
10/2005
2/2007
8/2006
3/2006
9/2005
8/2005
5/2005
Date
Page 1, updated first paragraph to reflect PowerQUICC II information. Updated note after second
paragraph.
In the features list in Section 1, “Overview,” corrected DDR data rate to show:
In Table 5, “MPC8347E Typical I/O Power Dissipation,” added GV
table footnote to designate rates that apply only to the TBGA package.
In Figure 43, “JTAG Interface Connection,” updated with new figure.
In Section 23, “Ordering
In Section 23.1, “Part Numbers Fully Addressed by This
paragraph directing customer to product summary page for available frequency configuration parts.
Updated back page information.
Changed all references to revision 2.0 silicon to revision 3.0 silicon.
Changed V
OV
In Table 60, “Suggested PLL Configurations,” deleted reference-number rows 902 and 703.
Section 2, “Electrical Characteristics,” moved to second section and all other section, table, and
figure numbering change accordingly.
Table 7, “CLKIN AC Timing Specifications:” Changed max rise and fall time from 1.2 to 2.3.
Table 22, “GMII Receive AC Timing Specifications:” Changed min t
Table 30, “MII Management AC Timing Specifications:” Changed max value of t
170.
Table 34, “Local Bus General Timing Parameters—DLL on:” Changed min t
Table 36, “JTAG interface DC Electrical Characteristics:” Changed V
Table 54, “Operating Frequencies for TBGA:”
Table 55, “Operating Frequencies for PBGA:”
Table 60, “Suggested PLL Configurations”: Removed some values from suggested PLL
configurations for reference numbers 902, 922, 903, and 923.
Table 67, “Part Numbering Nomenclature”: Updated TBD values in note 1.
Added Table 68, “SVR Settings.”
Added Section 23.2, “Part Marking.”
In Table 57, updated AAVID 30x30x9.4 mm Pin Fin (natural convection) junction-to-ambient thermal
resistance, from 11 to 10.
Added Table 2, “MPC8347E Typical I/O Power Dissipation.”
Table 1: Updated values for power dissipation that were TBD in Revision 2.
Table 1: Typical values for power dissipation are changed to TBD.
Table 48: Footnote numbering was wrong. THERM0 should have footnote 9 instead of 8.
• 266 MHz for PBGA parts for all silicon revisions
• 333 MHz for DDR for TBGA parts for silicon Rev. 1.x
• Updated TBD values.
• Changed maximum coherent system bus frequency for TBGA 667-MHz device to 333 MHz.
• Updated TBD values.
• Changed PBGA maximum coherent system bus frequency to 266 MHz, and maximum DDR
memory bus frequency to 133 MHz.
DD
Table 66. Document Revision History (continued)
– 0.3.
IH
minimum value in Table 36, “JTAG Interface DC Electrical Characteristics,” to
Information,”
Substantive Change(s)
replicated note from document introduction.
Document,”
DD
TTKHDX
IH
1.8-V values for DDR2; added
replaced third sentence of first
input high voltage min to 2.0.
Freescale Semiconductor
from 0.5 to 1.0.
LBIVKH2
MDKHDX
from 1.7 to 2.2.
from 70 to