MPC8358EZQAGDGA Freescale Semiconductor, MPC8358EZQAGDGA Datasheet - Page 6

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MPC8358EZQAGDGA

Manufacturer Part Number
MPC8358EZQAGDGA
Description
MPU POWERQUICC II PRO 668-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8358EZQAGDGA

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
400MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
668-PBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8358EZQAGDGA
Manufacturer:
FREESCAL
Quantity:
240
Part Number:
MPC8358EZQAGDGA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Overview
6
— Data bus widths:
— PCI 3.3-V compatible (not 5-V compatible)
— PCI host bridge capabilities on both interfaces
— PCI agent mode supported on PCI interface
— Support for PCI-to-memory and memory-to-PCI streaming
— Memory prefetching of PCI read accesses and support for delayed read transactions
— Support for posting of processor-to-PCI and PCI-to-memory writes
— On-chip arbitration, supporting five masters on PCI
— Support for accesses to all PCI address spaces
— Parity support
— Selectable hardware-enforced coherency
— Address translation units for address mapping between host and peripheral
— Dual address cycle supported when the device is the target
— Internal configuration registers accessible from PCI
Local bus controller (LBC)
— Multiplexed 32-bit address and data operating at up to 133 MHz
— Eight chip selects support eight external slaves
— Up to eight-beat burst transfers
— 32-, 16-, and 8-bit port sizes are controlled by an on-chip memory controller
— Three protocol engines available on a per chip select basis:
— Parity support
— Default boot ROM chip select with configurable bus width (8-, 16-, or 32-bit)
Programmable interrupt controller (PIC)
— Functional and programming compatibility with the MPC8260 interrupt controller
— Support for 8 external and 35 internal discrete interrupt sources
— Support for one external (optional) and seven internal machine checkstop interrupt sources
— Programmable highest priority request
— Four groups of interrupts with programmable priority
— External and internal interrupts directed to communication processor
— Redirects interrupts to external INTA pin when in core disable mode
— Unique vector number for each interrupt source
Dual industry-standard I
— Two-wire interface
MPC8358E PowerQUICC II Pro Processor Revision 2.1 PBGA Silicon Hardware Specifications, Rev. 3
– Single 32-bit data PCI interface that operates at up to 66 MHz
– General-purpose chip select machine (GPCM)
– Three user programmable machines (UPMs)
– Dedicated single data rate SDRAM controller
2
C interfaces
Freescale Semiconductor

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