MC68030RC16C Freescale Semiconductor, MC68030RC16C Datasheet - Page 358
MC68030RC16C
Manufacturer Part Number
MC68030RC16C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68030FE20C.pdf
(599 pages)
Specifications of MC68030RC16C
Processor Type
M680x0 32-Bit
Speed
166MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
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9.7.3 Transparent Translation Registers
MOTOROLA
The transparent translation registers (TTO and TT1) are 32-bit registers that
size block that can be defined by either TTx register is 16 Mbytes of logical
TTx registers operate independently of the E bit in the TC register and the
state of the MMUDIS signal. A transparent translation register is shown in
The fields of the transparent translation register are:
define blocks of logical address space that are transparently translated. Log-
ical addresses in a transparently translated block are used as physical ad-
dresses, without modification and without protection checking. The minimum
address space. The two TTx registers can specify blocks that overlap. The
Figure 9-37.
Enable (E)
A reset operation clears this bit.
This bit enables transparent translation of the block defined by this register:
Figure 9-37. Transparent Translation Register (TTO and TT1) Format
0 --Transparent translation disabled
1 - - Transparent translation enabled
LOGICAL ADDRESS BASE - - VALUE OF A31-A24 THAT DEFINES TRANSPARENT BLOCK
LOGICAL ADDRESS MASK - - BITS A31-A24 TO BE IGNORED
E - - ENABLE
CI - - CACHE INHIBIT
R/W - - READ/WRITE
RWM - - READ WRITE MASK
FC BASE - - FUNCTION CODE VALUE FOR TRANSPARENT BLOCK
FC MASK - - FUNCTION COOE BITS TO BE IGNORED
31
15
,101010101
LOGICAL ADDRESS BASE
MC68030 USER'S MANUAL
24
8
23
01
7
LOGICAL ADDRESS MASK
101
16
0
9-57
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