MC68030RC16C Freescale Semiconductor, MC68030RC16C Datasheet - Page 448
MC68030RC16C
Manufacturer Part Number
MC68030RC16C
Description
IC MPU 32BIT ENHANCED 128-PGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68030FE20C.pdf
(599 pages)
Specifications of MC68030RC16C
Processor Type
M680x0 32-Bit
Speed
166MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
128-PGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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10.5
MOTOROLA
10.5.1 Coprocessor-Detected Exceptions
lease; for a conditional category instruction, it is an evaluated true/false
When the MC68030 receives the take post-instruction exception primitive, it
with an exception. If the exception handler does not modify the stack frame,
the MC68030 returns from the exception handler to begin execution at the
The coprocessor uses this primitive to request exception processing when
EXCEPTIONS
Various exception conditions related to the execution of coprocessor instruc-
tions may occur. Whether an exception is detected by the main processor
tion processing. Servicing these coprocessor-related exceptions is an exten-
assumes that the coprocessor either completed or aborted the instruction
it completes or aborts an instruction while the main processor is awaiting a
condition indicator. Thus, the operation of the MC68030 in response to this
primitive is compatible with standard M68000 Family instruction related ex-
ception processing (for example, the divide-by-zero exception).
or by the coprocessor, the main processor coordinates and performs excep-
sion of the protocol used to service standard M68000 Family exceptions. That
coprocessor that an exception condition has occurred, the main processor
CESSING SEQUENCE.
Exceptions that the coprocessor detects, also those that the main processor
detects, are usually classified as coprocessor-detected exceptions. These ex-
ceptions can occur during M68000 coprocessor interface operations, internal
operations, or other system-related operations of the coprocessor.
through the use of one of the three take exception primitives defined for the
ceptions are signaled by response primitives. Coprocessor-detected format
Words.
location specified by the scanPC field of the stackframe. This location should
be the address of the next instruction to be executed.
normal response. For a general category instruction, the response is a re-
is, when either the main processor detects an exception or is signaled by the
proceeds with exception processing as described in 8.1 EXCEPTION
Most coprocessor-detected exceptions are signaled to the main processor
M68000 coprocessor interface. The main processor responds to these pri-
mitives as previously described. However, not all coprocessor-detected ex-
errors during the cpSAVE or cpRESTORE instruction are signaled to the main
processor using the invalid format word described in 10.2.3.4.3
MC68030 USER'S MANUAL
Invalid Format
PRO-
10-61
1(:
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