MPC8270ZUUPEA Freescale Semiconductor, MPC8270ZUUPEA Datasheet - Page 30

IC MPU POWERQUICC II 480-TBGA

MPC8270ZUUPEA

Manufacturer Part Number
MPC8270ZUUPEA
Description
IC MPU POWERQUICC II 480-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIr
Datasheet

Specifications of MPC8270ZUUPEA

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
450MHz
Voltage
1.5V
Mounting Type
Surface Mount
Package / Case
480-TBGA
Processor Series
MPC8xxx
Core
603e
Data Bus Width
32 bit
Maximum Clock Frequency
450 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
32KB
Cpu Speed
450MHz
Embedded Interface Type
I2C, JTAG, SPI, UART
Digital Ic Case Style
TBGA
No. Of Pins
480
Rohs Compliant
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MPC8270ZUUPE
MPC8270ZUUPE

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Clock Configuration Modes
30
1
2
3
4
5
6
MODCK[1-3]
guarantees only the required minimum CPU operating frequency. The “high” values are for the purpose of illustration only.
Users must select a mode and input bus frequency so that the resulting configuration does not violate the frequency rating of
the user’s device. The minimum CPM frequency is 120 MHz. Minimum CPU frequency is determined by the clock mode. For
modes with a CPU multiplication factor <= 3, the minimum CPU frequency is 150 MHz for commercial temperature devices
and 175 MHz for extended temperature devices. For modes with a CPU multiplication factor >= 3.5: for Rev0.1 the minimum
CPU frequency is 250 MHz; for RevA or later the minimum CPU frequency is 150 MHz for commercial temperature devices
and 175 MHz for extended temperature devices.
MODCK_H-
The “low” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency in a table entry
As
MODCK_H = hard reset configuration word [28–31]. MODCK[1-3] = three hardware configuration pins.
60x and local bus frequency. Identical to CLKIN.
CPM multiplication factor = CPM clock/bus clock
CPU multiplication factor = Core PLL multiplication factor
1101_000
1101_001
1101_010
1101_100
1101_101
1100_000
1100_001
1100_010
1101_011
1101_110
1110_000
1110_001
1110_010
1110_011
1110_100
Mode
Table 15
3
Table 17. Clock Configurations for PCI Host Mode (PCI_MODCK=0)
shows, PCI_MODCK determines the PCI clock frequency range. Refer to
100.0 133.3
100.0 133.3
100.0 133.3
100.0 133.3
100.0 133.3
125.0 166.7
125.0 166.7
100.0 133.3
100.0 133.3
100.0 133.3
100.0 133.3
100.0 133.3
Bus Clock
Low
(MHz)
High
MPC8280 PowerQUICC™ II Family Hardware Specifications, Rev. 1.8
4
Multiplication
Factor
CPM
2.5
2.5
2.5
2.5
2.5
2
2
3
3
3
3
3
5
250.0 333.3
250.0 333.3
250.0 333.3
250.0 333.3
250.0 333.3
250.0 333.3
250.0 333.3
300.0 400.0
300.0 400.0
300.0 400.0
300.0 400.0
300.0 400.0
Low
CPM Clock
(MHz)
High
Multiplication
Reserved
Reserved
Reserved
Factor
CPU
3.5
4.5
3.5
4.5
5.5
3
4
5
3
4
4
5
6
300.0 400.0
350.0 466.6
400.0 533.3
450.0 599.9
500.0 666.6
375.0 500.0
500.0 666.6
350.0 466.6
400.0 533.3
450.0 599.9
500.0 666.6
550.0 733.3
Low
CPU Clock
(MHz)
Table 18
High
1, 2
for lower configurations.
(continued)
Division
Freescale Semiconductor
Factor
PCI
5
5
5
5
5
5
5
6
6
6
6
6
Low High
50.0 66.7
50.0 66.7
50.0 66.7
50.0 66.7
50.0 66.7
50.0 66.7
50.0 66.7
50.0 66.7
50.0 66.7
50.0 66.7
50.0 66.7
50.0 66.7
PCI Clock
(MHz)

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