MPC8270ZUUPEA Freescale Semiconductor, MPC8270ZUUPEA Datasheet - Page 6

IC MPU POWERQUICC II 480-TBGA

MPC8270ZUUPEA

Manufacturer Part Number
MPC8270ZUUPEA
Description
IC MPU POWERQUICC II 480-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIr
Datasheet

Specifications of MPC8270ZUUPEA

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
450MHz
Voltage
1.5V
Mounting Type
Surface Mount
Package / Case
480-TBGA
Processor Series
MPC8xxx
Core
603e
Data Bus Width
32 bit
Maximum Clock Frequency
450 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
32KB
Cpu Speed
450MHz
Embedded Interface Type
I2C, JTAG, SPI, UART
Digital Ic Case Style
TBGA
No. Of Pins
480
Rohs Compliant
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
MPC8270ZUUPE
MPC8270ZUUPE

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Overview
6
— Four serial communications controllers (SCCs) identical to those on the MPC860, supporting the digital
— Universal serial bus (USB) controller
— Two serial management controllers (SMCs), identical to those of the MPC860
— One serial peripheral interface identical to the MPC860 SPI
— One inter-integrated circuit (I
— Up to eight TDM interfaces (four on the MPC8270)
portions of the following protocols:
– Ethernet/IEEE 802.3 CDMA/CS
– HDLC/SDLC and HDLC bus
– Universal asynchronous receiver transmitter (UART)
– Synchronous UART
– Binary synchronous (BISYNC) communications
– Transparent
– Supports USB 2.0 full/low rate compatible
– USB host mode
– Supports control, bulk, interrupt, and isochronous data transfers
– CRC16 generation and checking
– NRZI encoding/decoding with bit stuffing
– Supports both 12- and 1.5-Mbps data rates (automatic generation of preamble token and data rate
– Flexible data buffers with multiple buffers per frame
– Supports local loopback mode for diagnostics (12 Mbps only)
– Supports USB slave mode
– Four independent endpoints support control, bulk, interrupt, and isochronous data transfers
– CRC16 generation and checking
– CRC5 checking
– NRZI encoding/decoding with bit stuffing
– 12- or 1.5-Mbps data rate
– Flexible data buffers with multiple buffers per frame
– Automatic retransmission upon transmit error
– Provide management for BRI devices as general circuit interface (GCI) controllers in time-
– Transparent
– UART (low-speed operation)
– Microwire compatible
– Multiple-master, single-master, and slave modes
– Supports two groups of four TDM channels for a total of eight TDMs (one group of four on the
– 2,048 bytes of SI RAM
– Bit or byte resolution
– Independent transmit and receive routing, frame synchronization
configuration). Note that low-speed operation requires an external hub.
division-multiplexed (TDM) channels
MPC8270 and the MPC8275)
MPC8280 PowerQUICC™ II Family Hardware Specifications, Rev. 1.8
2
C) controller (identical to the MPC860 I
2
C controller)
Freescale Semiconductor

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