MC68030RC50C Freescale Semiconductor, MC68030RC50C Datasheet - Page 310

• Manufacturer Part Number: MC68030RC50C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC50C

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

MOTOROLA
the index into the lowest level of the tree structure. The tables selected by
the index at this level are page tables; every descriptor in these tables is (or
The page size (PS) field of the TC register specifies the page size for the
system. The number of pages in the system is equal to the logical address
space divided by the page size. The maximum number of pages that can be
defined by a translation tree is greater than 16 million (232/28). The minimum
defining as many as seven regions of the above size (FC=0-6). The entire
tation of large translation tables.
The use of a tree structure with as many as five levels of tables provides
code bits. In this case, the pointer table at this level contains eight descriptors.
The next level of the structure (or the top level when the FCL bit of the TC
address (disregarding the number of bits specified by the IS field). The num-
the TC register. If, for example, the TIA field contains the value 5, the index
for this level contains five bits, and the pointer table at this level contains at
Similarly, the TIB, TIC, and TID fields of the TC register define the indexes
for lower levels of the translation table tree. When one of these fields contains
zero, the remaining Tlx fields
number is 4 (217/215). The function code can also be used in the table lookup,
range of the logical address space(s) can be defined by translation tables of
many sizes. The MC68030 provides flexibility that simplifies the implemen-
granularity in translation table design. The LIMIT field of the root pointer can
limit the value of the first index and limits the actual number of descriptors
required. Optionally, the top level of the structure can be indexed by function
register is set to zero) is indexed by the most significant bits of the logical
ber of logical address bits used for this index is specified by the TIA field of
most 32 descriptors.
represents) a page descriptor. Figure 9-6 shows how the TIx fields of the TC
register apply to a function code and logical address.
F-q
2
0
31
,s
I
Figure 9-6. Derivation of Table Index Fields
I +T,A
A
MC68030 USER'S MANUAL
a r e
+TIB
8
LOGICAL ADDRESS
ignored; the last nonzero Tlx field defines
i
+,,C I +T0 I
O
D
OFFSET
PS
J
9-9
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