MC68030RC50C Freescale Semiconductor, MC68030RC50C Datasheet - Page 355

• Manufacturer Part Number: MC68030RC50C
• Description: IC MPU 32BIT ENHANCED 128-PGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68030RC50C

• Processor Type: M680x0 32-Bit
• Speed: 50MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 128-PGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

9
9-54
9.7.2
The translation control register (TC) is a 32-bit register that contains the
Writing to this register optionally causes a flush of the entire ATC. When
written with the E bit (bit 31) set (translation enabled), a consistency check
added together until a zero field is reached, and this sum is added to PS and
control fields for address translation. All unimplemented fields of this register
are read as zeros and must always be written as zeros.
is performed on the values of PS, IS, and TIx as follows. The TIx fields are
M M U CONFIGURATON EXCEPTION) is taken. If an M M U configuration ex-
ception occurs, the TC register is updated with the data, and the E bit is
cleared. The translation control register is shown in Figure 9-36.
IS. The total must be 32, or an M M U configuration exception (refer to 9.7.5.3
T r a n s l a t i o n
Figure 9-36. Translation Control Register (TC) Format
Figure 9-35. Root Pointer Register (CRP, SRP) Format
L / U
DT - - DESCRIPTOR TYPE
LIMIT - - LIMIT ON TABLE INDEX FOB THIS TABLE ADDRESS
TABLE ADDRESS
TIA, TIB, TIC, TID - - TABLE INDICES
L/U
E - - ENABLE
SRE
FCL - - FUNCTION CODE LOOKUP ENABLE
PS - - PAGE SIZE
IS - - INITIAL SHIFT
63
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31
C o n t r o l R e g i s t e r
15
- -
- -
LOWER OR UPPER PAGE RANGE
SUPERVISOR ROOT POINTER ENABLE
TIA
- -
MC68030 USER'S MANUAL
12
TABLE ADDRESS (PA15-PA4)
ADDRESS OF TABLE AT NEXT LEVEL OR PAGE OFFSET IF DT = I
TABLE ADDRESS (PA3I-PA16)
TIB
25
24
8
LIMIT
TIC
PS
4
20
4
UNUSED
TID
IS
OT
48
0
16
0
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