MPC180LMB Freescale Semiconductor, MPC180LMB Datasheet - Page 15

IC SECURITY PROCES 66MHZ 100LQFP

MPC180LMB

Manufacturer Part Number
MPC180LMB
Description
IC SECURITY PROCES 66MHZ 100LQFP
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC180LMB

Processor Type
Security Processor
Speed
66MHz
Voltage
1.8V
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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1.3 Architectural Overview
The MPC180 has a slave interface to the MPC8xx system bus and MPC8260 local bus and
maps into the host processor’s memory space. Each encryption algorithm is mapped to a
unique address space. To perform encryption operations, the host reads and writes to the
MPC180 to setup the execution unit and, then, transfers data to the execution unit directly
or through the external bus interface.
In FIFO mode, the MPC180 accepts data into the 4-Kbit input buffer and returns burst data
through the output buffer. In this way, the host can automatically transfer bulk data
through a given EU. This minimizes host management overhead and increases overall
system throughput. Once the host configures the external bus interface (EBI), it receives
an interrupt only after all data has been transferred or processed by the MPC180.
DMA Request
DMA Request
8xx/6xx
(Slave)
I/F
EEPROM
SDRAM
DIMMs
OUTPUT
INPUT
4K bit
FIFO
4K bit
FIFO
Figure 1-2. Typical MPC8260 System Example
Controller
Freescale Semiconductor, Inc.
For More Information On This Product,
Logic
Logic
DMA
DMA
60x Bus
SDRAM
Figure 1-3. MPC180 Block Diagram
Go to: www.freescale.com
Chapter 1. Overview
RSA
ECC
I/O or Network
MPC8260
Interface
SHA-1
MD 5
3DES
DES/
MPC180
SDRAM
Architectural Overview
ARC4
Local Bus
RNG
1-3

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