MC68HC000EI10 Freescale Semiconductor, MC68HC000EI10 Datasheet - Page 87
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MC68HC000EI10
Manufacturer Part Number
MC68HC000EI10
Description
IC MPU 16BIT 10MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Specifications of MC68HC000EI10
Processor Type
M680x0 32-Bit
Speed
10MHz
Voltage
3.3V, 5V
Mounting Type
Surface Mount
Package / Case
68-PLCC
Family Name
M68000
Device Core
ColdFire
Device Core Size
16/32Bit
Frequency (max)
10MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
68
Package Type
PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
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Manufacturer
Quantity
Price
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The privilege mode is a mechanism for providing security in a computer system. Programs
should access only their own code and data areas and should be restricted from
accessing information that they do not need and must not modify. The operating system
executes in the supervisor mode, allowing it to access all resources required to perform
the overhead tasks for the user mode programs. Most programs execute in user mode, in
which the accesses are controlled and the effects on other parts of the system are limited.
6.1.1 Supervisor Mode
The supervisor mode has the higher level of privilege. The mode of the processor is
determined by the S bit of the status register; if the S bit is set, the processor is in the
supervisor mode. All instructions can be executed in the supervisor mode. The bus cycles
generated by instructions executed in the supervisor mode are classified as supervisor
references. While the processor is in the supervisor mode, those instructions that use
either the system stack pointer implicitly or address register seven explicitly access the
SSP.
6.1.2 User Mode
The user mode has the lower level of privilege. If the S bit of the status register is clear,
the processor is executing instructions in the user mode.
Most instructions execute identically in either mode. However, some instructions having
important system effects are designated privileged. For example, user programs are not
permitted to execute the STOP instruction or the RESET instruction. To ensure that a user
program cannot enter the supervisor mode except in a controlled manner, the instructions
that modify the entire status register are privileged. To aid in debugging systems software,
the move to user stack pointer (MOVE to USP) and move from user stack pointer (MOVE
from USP) instructions are privileged.
The bus cycles generated by an instruction executed in user mode are classified as user
references. Classifying a bus cycle as a user reference allows an external memory
management device to translate the addresses of and control access to protected portions
of the address space. While the processor is in the user mode, those instructions that use
either the system stack pointer implicitly or address register seven explicitly access the
USP.
6.1.3 Privilege Mode Changes
Once the processor is in the user mode and executing instructions, only exception
processing can change the privilege mode. During exception processing, the current state
of the S bit of the status register is saved, and the S bit is set, putting the processor in the
6-2
To implement virtual machine concepts in the MC68010, the
move from status register (MOVE from SR), move to/from
control register (MOVEC), and move alternate address space
(MOVES) instructions are also privileged.
M68000 8-/16-/32-BIT MICROPROCESSORS USER'S MANUAL
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
NOTE
MOTOROLA