AD1939YSTZ Analog Devices Inc, AD1939YSTZ Datasheet - Page 6

• Manufacturer Part Number: AD1939YSTZ
• Description: IC CODEC 24BIT ADC/DAC 64LQFP
• Manufacturer: Analog Devices Inc
• Type: General Purposer

Specifications of AD1939YSTZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 4 / 8
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 94 / 94
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 110
• Voltage - Supply, Analog: 3 V ~ 3.6 V
• Voltage - Supply, Digital: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Audio Codec Type: Stereo
• No. Of Adcs: 4
• No. Of Dacs: 8
• No. Of Input Channels: 4
• No. Of Output Channels: 8
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 112dB
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3/4.5V
• Single Supply Voltage (max): 3.6/5.5V
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

AD1939
DIGITAL FILTERS
Table 6.
Parameter
ADC DECIMATION FILTER
DAC INTERPOLATION FILTER
TIMING SPECIFICATIONS
−40°C < T
Table 7.
Parameter
INPUT MASTER CLOCK (MCLK) AND
RESET
PLL
Pass Band
Pass-Band Ripple
Transition Band
Stop Band
Stop-Band Attenuation
Group Delay
Pass Band
Pass-Band Ripple
Transition Band
Stop Band
Stop-Band Attenuation
Group Delay
t
t
f
f
t
t
Lock Time
256 f
MH
MH
MCLK
MCLK
PDR
PDRR
MCLKO/XO Pin
S
VCO Clock, Output Duty Cycle,
A
< +105°C, DVDD = 3.3 V ± 10%.
Mode
All modes, typical @ 48 kHz
48 kHz mode, typical @ 48 kHz
96 kHz mode, typical @ 96 kHz
192 kHz mode, typical @ 192 kHz
48 kHz mode, typical @ 48 kHz
96 kHz mode, typical @ 96 kHz
192 kHz mode, typical @ 192 kHz
48 kHz mode, typical @ 48 kHz
96 kHz mode, typical @ 96 kHz
192 kHz mode, typical @ 192 kHz
48 kHz mode, typical @ 48 kHz
96 kHz mode, typical @ 96 kHz
192 kHz mode, typical @ 192 kHz
48 kHz mode, typical @ 48 kHz
96 kHz mode, typical @ 96 kHz
192 kHz mode, typical @ 192 kHz
48 kHz mode, typical @ 48 kHz
96 kHz mode, typical @ 96 kHz
192 kHz mode, typical @ 192 kHz
Condition
MCLK duty cycle
MCLK frequency
Low
Recovery
MCLK and LRCLK input
Rev. C | Page 6 of 32
Comments
DAC/ADC clock source = PLL clock @ 256 f
f
DAC/ADC clock source = direct MCLK @ 512 f
(bypass on-chip PLL)
PLL mode, 256 f
Direct 512 f
Reset to active output
S
, 512 f
S
, and 768 f
S
Factor
0.4375 f
0.5 f
0.5625 f
22.9844/f
0.4535 f
0.3646 f
0.3646 f
0.5 f
0.5 f
0.5 f
0.5465 f
0.6354 f
0.6354 f
25/f
11/f
8/f
mode
S
S
S
S
S
S
S
S
reference
S
S
S
S
S
S
S
S
S
S
Min
79
35
70
70
70
Typ
21
±0.015
24
27
479
22
70
24
48
96
26
61
122
521
115
42
S
, 384
S
Min
40
40
6.9
15
4096
40
Max
±0.01
±0.05
±0.1
Max
60
60
13.8
27.6
10
60
Unit
kHz
dB
kHz
kHz
dB
µs
kHz
kHz
kHz
dB
dB
dB
kHz
kHz
kHz
kHz
kHz
kHz
dB
dB
dB
µs
µs
µs
Unit
%
%
MHz
MHz
ns
t
ms
%
MCLK