CS42516-DQZR Cirrus Logic Inc, CS42516-DQZR Datasheet - Page 23

IC CODEC S/PDIF RCVR 64-LQFP

CS42516-DQZR

Manufacturer Part Number
CS42516-DQZR
Description
IC CODEC S/PDIF RCVR 64-LQFP
Manufacturer
Cirrus Logic Inc
Type
Audio Codecr
Datasheet

Specifications of CS42516-DQZR

Package / Case
64-LQFP
Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
2 / 6
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
114 / 110
Voltage - Supply, Analog
4.75 V ~ 5.25 V
Voltage - Supply, Digital
3.13 V ~ 5.25 V
Operating Temperature
-40°C ~ 105°C
Mounting Type
Surface Mount
Number Of Adc Inputs
2
Number Of Dac Outputs
6
Conversion Rate
192 KSPs
Interface Type
Serial (I2C, SPI)
Resolution
24 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Number Of Channels
2 ADC, 6 DAC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1502 - BOARD EVAL FOR CS42518 CODEC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS42516-DQZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
DS583F1
4.3.3
4.3.4
CX_SDINx
Digital Volume and Mute Control
Each DAC’s output level is controlled via the Volume Control registers operating over the range of 0 to
-127 dB attenuation with 0.5 dB resolution. See
14h)” on page
rate controlled by the SZC[1:0] bits in the Digital Volume Control register. See
(address 0Dh)” on page
Each output can be independently muted via mute control bits in the register
0Eh)” on page
value (-127 dB). When the XX_MUTE bit is disabled, the corresponding DAC returns to the attenuation
level set in the Volume Control register. The attenuation is ramped up and down at the rate specified by
the SZC[1:0] bits.
The Mute Control pin, MUTEC, is typically connected to an external mute control circuit. The Mute Control
pin outputs high impedance during Power-Up or in Power-Down Mode by setting the PDN bit in the reg-
ister
controlled by the user via the control port, or automatically asserted high when zero data is present on all
DAC inputs, or when serial port clock errors are present. To prevent large transients on the output, it is
desirable to mute the DAC outputs before the Mute Control pin is asserted. Please see the MUTEC pin
in the Pin Descriptions section for more information.
Each of the RXP1/GPO1-RXP7/GPO7 can be programmed to provide a hardware MUTE signal to indi-
vidual circuits. When not used as an S/PDIF input, each pin can be programmed as an output, with spe-
cific muting capabilities as defined by the function bits in the register
(addresses 29h to 2Fh)” on page
ATAPI Specification
The CS42516 implements the channel-mixing functions of the ATAPI CD-ROM specification. The
ATAPI functions are applied per A-B pair. Refer to
mation.
“Power Control (address 02h)” on page 47
Right Channel
Left Channel
Audio Data
Audio Data
58. When enabled, each XX_MUTE bit attenuates the corresponding DAC to its maximum
58. Volume control changes are programmable to ramp in increments of 0.125 dB at the
Figure 8. ATAPI Block Diagram (x = channel pair 1, 2, or 3)
56.
69.
Σ
to a ‘1’. Once out of Power-Down Mode, the pin can be
“Volume Control (addresses 0Fh, 10h, 11h, 12h, 13h,
Table 16 on page 60
A Channel
B Channel
Volume
Volume
Control
Control
“RXP/General-Purpose Pin Control
and
Σ
Figure 8
“Volume Transition Control
“Channel Mute (address
MUTE
MUTE
for additional infor-
CS42516
AOUTAx
AOUTBx
23

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