W6810ISG Nuvoton Technology Corporation of America, W6810ISG Datasheet
W6810ISG
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W6810ISG Summary of contents
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W6810 SINGLE CHANNEL VOICEBAND CODEC Data Sheet Revision A14 - 1 - ...
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GENERAL DESCRIPTION The W6810 is a general-purpose single channel PCM CODEC with pin-selectable μ-Law or A-Law companding. The device is compliant with the ITU G.712 specification. It operates off of a single +5V power supply and is available in ...
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BLOCK DIAGRAM Re BCLKR BCLKR PC cei M FSR ve PCMR Tra BCLKT BCLKT BCLKT FST mit PCMT 512 kHz 256 kHz 256 kHz Pre - scaler Pre - Scaler MCLK MCLK 256 kHz, 256 kHz, ...
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TABLE OF CONTENTS 1. GENERAL DESCRIPTION .................................................................................................................. 2 2. FEATURES ......................................................................................................................................... 2 3. BLOCK DIAGRAM .............................................................................................................................. 3 4. TABLE OF CONTENTS ...................................................................................................................... 4 5. PIN CONFIGURATION ....................................................................................................................... 6 6. PIN DESCRIPTION ............................................................................................................................. 7 7. FUNCTIONAL DESCRIPTION ............................................................................................................ 9 7.1. ...
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TYPICAL APPLICATION CIRCUIT ................................................................................................. 30 12. PACKAGE SPECIFICATION .......................................................................................................... 32 12.1. 20L TSSOP - 4.4X6.5mm .......................................................................................................... 32 12.2. 20L SOG (SOP)-300mil ............................................................................................................. 33 12.3. 20L SSOP-209 mil ..................................................................................................................... 34 14. VERSION HISTORY ....................................................................................................................... 36 Publication Release Date: January 2009 ...
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PIN CONFIGURATION REF PAI 3 3 PAO PAO FSR FSR 7 7 PCMR 8 8 BCLKR BCLKR 9 9 ...
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PIN DESCRIPTION Pin Pin Name No. This pin is used to bypass the on-chip 2.5V voltage reference. It needs to be decoupled through a 0.1 μF ceramic decoupling capacitor. No external loads should be tied ...
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Pin Pin Name No. AI- 18 Inverting input of the first gain stage in the transmit path. AI+ 19 Non-inverting input of the first gain stage in the transmit path. Mid-Supply analog ground pin, which supplies a 2.5 Volt reference ...
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FUNCTIONAL DESCRIPTION W6810 is a single-rail, single channel PCM CODEC for voiceband applications. The CODEC complies with the specifications of the ITU-T G.712 recommendation. The CODEC also includes a complete μ- Law and A-Law compander. The μ-Law and A-Law ...
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AI+ (Pin Table 7.1 Input Amplifier Modes of operation The output of the input amplifier is fed through a low-pass filter to prevent aliasing at the switched capacitor 3.4 kHz ...
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Power Management 7.3.1. Analog and Digital Supply The power supply for the analog and digital parts of the W6810 must be 5V +/- 10%. This supply voltage is connected to the V pin. The V DD ceramic capacitor. 7.3.2. ...
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The transmit data pin PCMT will become high impedance when the Frame Sync signal FST becomes LOW while the data is transmitted or when half of the LSB is transmitted. The internal decision logic will determine ...
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System Timing The system can work at 256 kHz, 512 kHz, 1536 kHz, 1544 kHz, 2048 kHz, 2560 kHz & 4096 kHz master clock rates. The system clock is supplied through the master clock input MCLK and can be ...
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TIMING DIAGRAMS FST ...
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FST, FSR Frequency FS T FST / FSR Minimum Low Width FSL 1/T BCLKT, BCLKR Frequency BCK T BCLKT, BCLKR High Pulse Width BCKH T BCLKT, BCLKR Low Pulse Width BCKL BCLKT 0 Falling Edge to FST Rising T ...
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RSM FST ...
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SYMBOL DESCRIPTION 1/T FST, FSR Frequency FS 1/T BCLKT, BCLKR Frequency BCK T BCLKT, BCLKR High Pulse Width BCKH T BCLKT, BCLKR Low Pulse Width BCKL BCLKT –1 Falling Edge to FST Rising Edge Hold T FTRH Time FST Rising ...
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FST T FSFH T T FSR H FSR ...
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FST T FSFH T T FSR H FSR ...
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SYMBOL DESCRIPTION 1/T Master Clock Frequency MCK T / MCLK Duty Cycle for 256 kHz MCKH T Operation MCK T Minimum Pulse Width High for MCKH MCLK(512 kHz or Higher) T Minimum Pulse Width Low for MCLK MCKL (512 kHz ...
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ABSOLUTE MAXIMUM RATINGS 9. BSOLUTE AXIMUM ATINGS Condition Junction temperature Storage temperature range Voltage Applied to any pin Voltage applied to any pin (Input current limited to +/-20 mA Stresses ...
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ELECTRICAL CHARACTERISTICS 10. ENERAL ARAMETERS Symbol Parameters V Input Low Voltage IL V Input High Voltage IH V PCMT Output Low Voltage OL V PCMT Output High Voltage OH V Current (Operating) - ADC + DAC I ...
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NALOG IGNAL EVEL AND =5V ±10 =0V; T =-40°C to +85°C; all analog signals referred MCLK=BCLK= 2.048MHz; FST=FSR=8kHz synchronous operation PARAMETER SYM. CONDITION Absolute L 0 dBm0 = 0dBm ...
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A D NALOG ISTORTION AND =5V ±10 =0V; T =-40°C to +85°C; all analog signals referred MCLK=BCLK= 2.048MHz; FST=FSR=8kHz synchronous operation PARAMETER SYM. Total Distortion vs. +3 dBm0 D LTμ Level Tone ...
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NALOG NPUT AND UTPUT =5V ±10 =0V; T =-40°C to +85°C; all analog signals referred PARAMETER AI Input Offset Voltage AI Input Current AI Input Resistance AI Input Capacitance ...
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PARAMETER PAI Input Offset Voltage PAI Input Current PAI Input Resistance PAI Amp Gain Bandwidth Product Output Offset Voltage Load Resistance Load Capacitance PO Output Current PO Output Resistance PO Differential Gain PO Differential Signal to Distortion C-Message weighted PO ...
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D I/O IGITAL 10.5.1. μ-Law Encode Decode Characteristics Normalized Encode Decision Levels Sign Chord Chord 8159 7903 : 4319 4063 : 2143 2015 : 1055 1 0 ...
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A-Law Encode Decode Characteristics Normalized Encode Decision Sign Chord Chord Levels 4096 3968 : 2048 2048 : 1088 1024 : 544 512 : 272 ...
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PCM Codes for Zero and Full Scale μ-Law Level Sign bit Chord bits (D7) (D6,D5,D4) + Full Scale 1 000 + Zero 1 111 - Zero 0 111 - Full Scale 0 000 10.5.4. PCM Codes for 0dBm0 Output ...
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TYPICAL APPLICATION CIRCUIT 1.0 uF 27K - DIFFERENTIAL AUDIO IN + 1.0 uF 27K 0. DIFFERENTIAL AUDIO OUT RL > 150 + Figure 11.1 Typical circuit for Differential Analog I/O’s 1.0 uF 27K AUDIO IN ...
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ELECTRET MICROPHONE 0.01 uF 0.1 uF 27K 1.5K SPEAKER Figure 11.3 Handset Interface 27K 1.0 uF 600 0.01 uF TRANSFORMER 0.1 uF 600 OHM 1:1 Figure 11.4 Transformer Interface ...
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PACKAGE SPECIFICATION 12.1. 20L TSSOP - 4.4X6.5 MM PLASTIC THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP) DIMENSIONS DIMENSION (MM) SYMBOL MIN 0.05 A2 0.80 E 4.30 HE 6.40 BSC D 6.40 L 0.50 L1 1.00 REF b ...
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SOG (SOP)-300 MIL SMALL OUTLINE PACKAGE (SAME AS SOG & SOIC) DIMENSIONS SEATING b DIMENSION (MM) SYMBOL MIN. A 2.35 A1 0.10 b 0.33 c 0.23 E 7.40 D 12. 10. ...
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SSOP-209 MIL SEATING Y e SHRINK SMALL OUTLINE PACKAGE DIMENSION (MM) SYMBOL MIN. NOM 0.05 A2 1.65 b 0.22 c 0.09 D 6.90 E 5. ...
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... When ordering W6810 series devices, please refer to the following part numbers. Part Number Package Material Pb-free (RoHS) Package Package Type 20-Lead Plastic Thin Small Outline Package (TSSOP) Type 20-Lead Plastic Small Outline Package (SOG/SOP 20-Lead Plastic Small Outline Package (SSOP) W6810IWG W6810ISG W6810IRG Publication Release Date: January 2009 - 35 - W6810 Revision A14 ...
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VERSION HISTORY VERSION DATE PAGE A11 July 2005 11 29 A12 September, 29, 30 2005 A13 July, 2006 29 January A14 35 2009 35 Nuvoton products are not designed, ...