AD1980JSTZ Analog Devices Inc, AD1980JSTZ Datasheet - Page 20

• Manufacturer Part Number: AD1980JSTZ
• Description: IC CODEC STEREO 6-DAC 20B 48LQFP
• Manufacturer: Analog Devices Inc
• Series: SoundMAX®r
• Type: Audio Codec '97r

Specifications of AD1980JSTZ

• Data Interface: Serial
• Resolution (bits): 16, 20 b
• Number Of Adcs / Dacs: 2 / 6
• Sigma Delta: No
• Dynamic Range, Adcs / Dacs (db) Typ: 82 / 90
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.15 V ~ 3.45 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 3.15/4.75V
• Single Supply Voltage (max): 3.45/5.25V
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD1980
Codec ID
00
00
00
01
01
10
10
11
This read/write Sample Rate Control Register contains 16-bit unsigned value, representing the rate of operation in Hz.
SRF[15:0]
This read/write Sample Rate Control Register contains 16-bit unsigned value, representing the rate of operation in Hz.
This register sets the sample rate for the surround DAC. This register’s reset default is to be locked to the PCM front DAC sample rate register (2-Ch).
To unlock this register, Bit SRU in Register 76h must be asserted.
SRS[15:0]
This read/write sample rate control register contains 16-bit unsigned value, representing the rate of operation in Hz.
This register sets the sample rate for the LFE DAC and Center DAC. This register’s reset default is to be locked to the PCM Front DAC sample rate register (2-Ch) .
To unlock the register bit, SRU in Register 76h must be asserted.
SRCL[15:0]
This read/write sample rate control register contains 16-bit unsigned value, representing the rate of operation in Hz.
SRA[15:0]
Reg
No. Name
2Ch PCM Front
Reg
No. Name
2Eh PCM Surr
Reg
No. Name
30h PCM LFE/
Reg
No. Name
32h PCM L/R
C DAC
Rate
DAC Rate
DAC Rate
ADC Rate
D15
SRCL15 SRCL14 SRCL13 SRCL12 SRCL11 SRCL10 SRCL9 SRCL8 SRCL7 SRCL6 SRCL5 SRCL4 SRCL3 SRCL2 SRCL1 SRCL0 BB80h
Sample Rate.
The sampling frequency range is from 7 kHz (1B58h) to 48 kHz (BB80h) in 1 Hz increments. If zero is written to
VRA, then the sample rate is reset to 48 kHz.
Sample Rate.
The sampling frequency range is from 7 kHz (1B58h) to 48 kHz (BB80h) in 1 Hz increments.
If zero is written to VRA bit, then the sample rate is reset to 48 kHz.
Sample Rate.
The sampling frequency range is from 7 kHz (1B58h) to 48 kHz (BB80h) in 1 Hz increments.
If zero is written to VRA, then the sample rate is reset to 48 kHz.
D15
SRA15
Sample Rate.
The sampling frequency range is from 7 kHz (1B58h) to 48 kHz (BB80h) in 1 Hz increments.
If zero is written to VRA, then the sample rate is reset to 48 kHz.
Function
2-Ch Primary w/SPDIF
4-Ch Primary w/SPDIF
6-Ch Primary w/SPDIF
+2-Ch Secondary w/SPDIF
+4-Ch Secondary w/SPDIF
+2-Ch Secondary w/SPDIF
+4-Ch Secondary w/SPDIF
+2-Ch Secondary w/SPDIF
D15
SRF15 SRF14 SRF13 SRF12 SRF11 SRF10 SRF9 SRF8 SRF7 SRF6 SRF5 SRF4 SRF3 SRF2 SRF1 SRF0 BB80h
D15
SRS15 SRS14 SRS13 SRS12 SRS11 SRS10 SRS9 SRS8 SRS7 SRS6 SRS5 SRS4 SRS3 SRS2 SRS1 SRS0 BB80h
D14
D14
D14
D14
SRA14 SRA13 SRA12 SRA11 SRA10 SRA9 SRA8 SRA7 SRA6 SRA5 SRA4 SRA3 SRA2 SRA1 SRA0 BB80h
D13
D13
D13
D13
AC ’97 2.2 AMAP Compliant Default SPDIF Slot Assignments
PCM LFE (and CENTER) DAC Rate Register (Index 30h)
D12
D12
D12
D12
PCM Surround DAC Rate Register (Index 2Eh)
PCM Front DAC Rate Register (Index 2Ch)
D11
D11
D11
D11
PCM ADC Rate Register (Index 32h)
SPSA = 00
3 and 4
3 and 4
3 and 4
3 and 4
3 and 4
3 and 4
3 and 4
3 and 4
D10
D10
D10
D10
D9
D9
D9
D9
–20–
D8
D8
D8
SPSA = 01
7 and 8 [default]
7 and 8
7 and 8
7 and 8
7 and 8
7 and 8
7 and 8
7 and 8
D8
D7
D7
D7
D7
D6
D6
D6
D6
D5
D5
D5
D5
SPSA = 10
6 and 9
6 and 9[default]
6 and 9
6 and 9[default]
6 and 9
6 and 9[default]
6 and 9
6 and 9
D4
D4
D4
D4
D3
D3
D3
D3
D2
D2
D2
D2
SPSA = 11
10 and 11
10 and 11
10 and 11[default]
10 and 11[default]
10 and 11[default]
10 and 11[default]
D1
D1
D1
D1
D0
D0
D0
D0
REV. 0
Default
Default
Default
Default