DS3112+ Maxim Integrated Products, DS3112+ Datasheet - Page 97
![IC MUX TEMPE T3/E3 256-BGA](/photos/6/82/68222/406-256-bga_sml.jpg)
DS3112+
Manufacturer Part Number
DS3112+
Description
IC MUX TEMPE T3/E3 256-BGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3112.pdf
(133 pages)
Specifications of DS3112+
Controller Type
Framer, Multiplexer
Interface
Parallel/Serial
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
150mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-PBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Bits 6 and 7: Transmit FEAC Codeword Select Bits 0 and 1 (TFS0 and TFS1). These two bits control what
two available codewords should be generated. Both TFS0 and TFS1 are edge triggered. To change the action, the
host must go back to the null state (TFS0 = TFS1 = 0) before proceeding to the desired action. Wait a minimum of
(10) codewords before changing to out-of-idle state.
Bits 8 to 13: Transmit FEAC Codeword B Data (TFCB0 to TFCB5). The FEAC codeword is of the form
...0xxxxxx011111111... where the rightmost bit is transmitted first. These six bits are the middle six bits of the
second byte of the FEAC codeword (i.e., the six “x” bits). The device can generate two different codewords and
these six bits represent what will be transmitted for codeword B. TFCB0 is the LSB and is transmitted first while
TFCB5 is the MSB and is transmitted last. The TFS0 and TFS1 control bits determine if this codeword is to be
generated. These bits should only be changed when the transmit FEAC controller is in the idle state (TFS0 = 0 and
TFS1 = 0).
Bit 14: Interrupt Enable, Receive FEAC Idle (IERFI). This bit masks or enables interrupts caused by the
Receive FEAC Idle (RFI) bit in the FSR register.
Bit 15: Receive FEAC Controller Reset (RFR). A zero to one transition will reset the receive FEAC controller
and flush the Receive FEAC FIFO. This bit must be cleared and set again for a subsequent reset.
TFS1
0
0
1
1
0 = interrupt masked
1 = interrupt unmasked
TFS0
0
1
0
1
Idle state; do not generate a FEAC codeword (send all ones)
Send 10 of codeword A followed by all ones
Send 10 of codeword A followed by 10 of codeword B followed by all ones
Send codeword A continuously (will be sent for at least 10 times)
ACTION
97 of 133
DS3112
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