SI3453-B01-GM Silicon Laboratories Inc, SI3453-B01-GM Datasheet
SI3453-B01-GM
Specifications of SI3453-B01-GM
Related parts for SI3453-B01-GM
SI3453-B01-GM Summary of contents
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... Internal low-R power FETs with ON current sense circuitry Integrated transient voltage surge- suppressors DC disconnect (Si3453) or proprietary dV/dt™ disconnect (Si3452) sensing methods Applications Power over Ethernet Endpoint switches and Midspans for IEEE Std 802.3af and 802.3at Supports high power PDs, such as: ...
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... Si3452/3 also performs the IEEE-required powered device (PD) detection, classification, and disconnect functionality. The flexible architecture enables powered device disconnect detection using either DC disconnect (Si3453), or Silicon Laboratories' proprietary dV/dt™ disconnect (Si3452) sensing algorithm. dV/dt disconnect is an alternative to DC disconnect that requires no additional BOM components, does not dissipate extra device power, and fully interoperates with all powered devices ...
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T C ABLE O F ONTENTS Section 1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Si3452/3 1. Electrical Specifications Unless noted otherwise, specifications apply over the operating temperature range with VDD = +3.3 V, and VEE = –48 V relative to GND. VDD pins should be electrically shorted. AGND pins, DGND, GND12, and GND34 should ...
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Table 2. Recommended Operating Conditions Description Symbol Operating temperature T A Thermal impedance* θ JA Power Supply Voltages V supply voltage supply voltage Power Supply Currents V supply current ...
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Si3452/3 Table 4. Detection Specifications Description Detection current limit Detection voltage, when kΩ DET Detection slew rate Detection probe duration Detection probe cycle time Minimum valid signature resistance Maximum valid signature resistance Resistance at which open circuit ...
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Table 5. Classification Specifications Description Symbol Class event voltage V CLASS Mark event voltage V MARK Classification current I LIM_CLASS limit Classification current regions Classification delay T CLASS_DLY Classification event time T CLE Mark event time T ME Table 6. ...
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Si3452/3 Table 7. DC- and dV/dt™ Disconnect Specifications Description Symbol Load current to prevent I ON disconnect Load current to I OFF guarantee disconnect Disconnect delay T DCDV_DLY Table 8. Port Measurement and Monitoring Specifications Description Symbol Port current measurement ...
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Table 11. SMBus (I C) Timing Specifications (see Figure 1) Description Symbol Serial bus clock frequency f SCL SCL high time t SKH SCL low time t SKL SCL, SDA rise time t R_SCL SCL, SDA fall time t ...
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Si3452/3 Table 12. Interrupt (INT) Specifications Description Symbol Output low voltage V OL Table 13. Input Voltage Reference Specifications Description Symbol Nominal VREF input Reference tolerance VREF loading 10 Test Conditions Min INT pin driving ≤ 8.5 mA — Test ...
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PSE System-Level Diagrams Host I2C Controller Figure 2. 4-Port System with Direct Host Connection 3. PSE Application Diagrams Host / Switch Bidirectional Isolator AD0 AD1 AD2 AD3 1.1 V (e.g. TLV431) 44 Figure 3. 4-Port Application Diagram ...
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Si3452/3 4. Functional Description Integrating four independent high voltage PSE port interfaces, the Si3452/3 high voltage port controller enables an extremely flexible solution for virtually any PoE or PoE+ PSE application. The Si3452/3 provides all of the high voltage Power ...
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Classification Following a successful PD detection, the classification phase will be automatically initiated in all operational modes. During this phase a single measurement will be made determine how much power the PD device will draw ...
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... DC Maintain Power Signatures. For more information, see "AN399: dV/dt Disconnect and the IEEE 802.3 PoE Standard". 4.4.2. DC Disconnect (Si3453) The port current is continuously monitored by the Si3452/3. The Si3452/3 can dynamically change the measurement scale to achieve accuracy over a wide range of currents ...
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SMBus/I C Interface Details 2 The I C interface is a two-wire, bi-directional serial bus. The I Specification (SMBus), version 1.1, and compatible with the I system controller are byte oriented with the I method of extending the ...
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Si3452/3 4.8.1. Address Pins Pins with the same name must be externally connected and then tied high or low via a weak (10 k) pull up or pull down to establish the device address at power up. The Si3452/3 powers ...
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ARA 2 For I C operation, the Si3452/3 provides an Alert Response Address to the master when the Slave address is 0x0C and the INT pin is asserted. When these conditions are met, this IC begins to provide its ...
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Si3452/3 “DET compl“ indicates the completion of a detection cycle. Normally this bit will be masked. The DET complete bit would be used for legacy detection via modified link pulses. If the link pulse is returned indicating ...
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Once a port is turned on, I can be changed dynamically often un-desirable to use a low value of I CUT during port turn on because inrush can trigger the I on with the automatic I setting and ...
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Si3452/3 20 Rev. 0.42 ...
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Rev. 0.42 Si3452/3 21 ...
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Si3452/3 Table 21. Si3452/3 Port Mode Encoding 22 Table 19. Si3452/3 Detect Encoding Value Condition 000b Unknown 001b Short 010b Reserved 011b RLOW 100b Good 101b Rhigh 110b Ropen 111b Reserved Table 20. Si3452/3 Class Encoding Value Condition 000b Unknown ...
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Table 22. Si3452/3 Port Configuration PoE+ bit Class don’t care don’t care don’t care 0 *Note: During initial port turn-on (T START Table 23. Si3452/3 ...
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Si3452/3 6. Operational Notes 6.1. Port Turn On Ports are normally powered by either putting the Si3452 in the auto mode and allowing the Si3452 to control the powering sequence putting the Si3452 in the manual mode and ...
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PCB Layout Guidelines Due to the high current 800 mA per port, the following board layout guidelines apply. In addition, contact Silicon Laboratories. for access to complete PSE reference design databases including recommended layouts. The VEE1, ...
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Si3452/3 8. Pin Descriptions VEE1 VEE VREF AIN AOUT AGND RBIAS AGND NC VEE4 Pin # Name Type 1 VEE1 Supply 2 VEE Supply 3 VREF Analog input 4 AIN Analog input 5 AOUT Analog output 6 AGND Ground 7 ...
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Table 24. Si3452/3 Pin Descriptions (Continued) Pin # Name Type 14 SDA Digital I/O 15 GND34 Ground 16 SCL Digital I connect 18 DET3 Analog I/O 19 VDD Supply 20 VOUT3 Analog I/O 21 AD3 Digital I/O ...
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Si3452/3 Table 24. Si3452/3 Pin Descriptions (Continued) Pin # Name Type 39 VOUT1 Analog I/O 40 INT Digital output 28 Description Port 1 power FET switch output. When on, provides a low impedance path to VEE1. Active low interrupt output ...
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Package Outline: 40-Pin QFN The Si3452/3 is packaged in an industry-standard, RoHS compliant Figure 8. 40-Pin QFN Mechanical Diagram Table 25. Package Diagram Dimensions Dimension aaa ...
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Si3452/3 10. Recommended PCB Footprint Table 26. PCB Land Pattern Dimensions Dimension Figure 9. PCB Land Pattern Min 0.50 BSC 5.42 REF 5.42 REF 4.00 4.00 4.53 4.53 — ...
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Table 26. PCB Land Pattern Dimensions (Continued) Dimension ZD Notes: General 1. All dimensions shown are in millimeters (mm) unless otherwise noted. 2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification. 3. This Land Pattern Design is based on ...
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... Timing Number Si3452-B01-GM Configurable Configurable Si3452A-B01-GM Endpoint Si3452B-B01-GM Midspan Si3452C-B01-GM Endpoint Si3452D-B01-GM Midspan Si3453-B01-GM Configurable Configurable Si3453A-B01-GM Endpoint Si3453B-B01-GM Midspan Si3453C-B01-GM Endpoint Si3453D-B01-GM Midspan Notes: 1. Add “R” to the end of the ordering part number to denote tape-and-reel option. E.g., Si3452-B01-GMR. 2. The maximum PoE or PoE+ power applies to all ports on Auto mode devices. ...
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Device Marking Diagram Line # Text Value 1 Si3452 Base part number. This is not the “Ordering Part Number” since it does not contain a specific revision. Refer to "11. Ordering Guide" on page 32. for complete ordering information. ...
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Si3452 OCUMENT HANGE IST Revision 0.4 to Revision 0.41 VEE UVLO only. Due to the protection clamp, OVLO is not supported. Updated thermal information. Removed support for pin-selectable auto mode powerup. Changed device status ...
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N : OTES Rev. 0.42 Si3452/3 35 ...
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