DS3112+W Maxim Integrated Products, DS3112+W Datasheet - Page 95
![IC MUX T3/E3 3.3V 256-PBGA](/photos/6/82/68222/406-256-bga_sml.jpg)
DS3112+W
Manufacturer Part Number
DS3112+W
Description
IC MUX T3/E3 3.3V 256-PBGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3112.pdf
(133 pages)
Specifications of DS3112+W
Controller Type
Framer, Multiplexer
Interface
Parallel/Serial
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
150mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-PBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit #
Name
Default
Note: Bits that are underlined are read-only; all other bits are read-write.
Bit 0: Transmit Packet End (TEND).
Bit 2: Transmit FIFO Low Watermark (TLWM).
Bit 4: Receive FIFO High Watermark (RHWM).
Bit 5: Receive Packet Start (RPS).
Bit 6: Receive Packet End (RPE).
Bit 7: Transmit FIFO Underrun (TUDR).
Bit 13: Receive FIFO Overrun (ROVR).
Bit 15: Receive Abort Sequence Detected (RABT).
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
0 = interrupt masked
1 = interrupt unmasked
TUDR
RABT
15
7
0
0
RPE
14
—
—
6
0
IHSR
Interrupt Mask for HDLC Status Register
88h
ROVR
RPS
13
5
0
0
RHWM
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12
—
—
4
0
—
—
11
—
—
3
TLWM
10
—
—
2
0
—
—
—
—
1
9
TEND
—
—
DS3112
0
0
8
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