DS3148N Maxim Integrated Products, DS3148N Datasheet - Page 78
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DS3148N
Manufacturer Part Number
DS3148N
Description
IC 8CH DS3/3 FRAMER 349-BGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS3148.pdf
(89 pages)
Specifications of DS3148N
Controller Type
DS3/E3 Framer
Interface
LIU
Voltage - Supply
3.135 V ~ 3.465 V
Current - Supply
640mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
349-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
11.2 Microprocessor Interface Timing
Table 11-D. Microprocessor Interface Timing
(V
Note 16: In nonmultiplexed bus applications
Note 17: Whenever CS = 0 and RD = 0 in Intel mode or CS = 0 and R/WR = 1 and DS = 0 in Motorola mode, the bidirectional data bus D[7:0] is
Figure 11-4. SCLK Clock Timing
Setup Time for A[11:0] Valid to CS Active
Setup Time for CS Active to RD , WR , or DS
Active
Delay Time from RD or DS Active to D[7:0]
Valid
Hold Time from RD or WR or DS Inactive to
CS Inactive
Hold Time from CS or RD or DS Inactive to
D[7:0] Tri-State
Wait Time from WR or DS Active to Latch
D[7:0]
D[7:0] Setup Time to WR or DS Inactive
D[7:0] Hold Time from WR or DS Inactive
A[11:0] Hold from WR or RD or DS Inactive
RD , WR , or DS Inactive Time
Muxed Address Valid to ALE Falling
Muxed Address Hold Time
ALE Pulse Width
Setup Time for ALE High or Muxed
Address Valid to CS Active
SCLK Period
SCLK High and Low Time
SCLK Duty Cycle (High/Low)
DD
SCLK
= 3.3V ±5%, T
are normally connected to D[7:0] externally, and the falling edge of ALE latches the address.
driven as an output.
PARAMETER
A
= -40°C to +85°C.)
HIGH
t16
(Figure
t15
(Figure
11-5), ALE should be connected high. In multiplexed bus applications
LOW
t16
11-4,
SYMBOL
t16/t15
t10
t11
t12
t13
t14
t15
t16
t1
t2
t3
t4
t5
t6
t7
t8
t9
78 of 89
Figure
11-5, and
(Note 16)
(Note 16)
(Note 16)
(Note 16)
CONDITIONS
Figure
11-6)
MIN
5.0
2.0
5.0
7.0
65
10
75
10
10
30
19
40
0
0
0
0
TYP
(Figure
MAX
65
20
31
60
11-6), A[7:0]
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%