78M6612-GT/F/P1 Maxim Integrated Products, 78M6612-GT/F/P1 Datasheet - Page 81
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78M6612-GT/F/P1
Manufacturer Part Number
78M6612-GT/F/P1
Description
Current & Power Monitors & Regulators
Manufacturer
Maxim Integrated Products
Datasheet
1.78M6612-IMF.pdf
(111 pages)
Specifications of 78M6612-GT/F/P1
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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DS_6612_001
Rev. 1.2
Name
RTC_DEC_SEC
RTC_INC_SEC
RTM_E
RTM0[7:0]
RTM1[7:0]
RTM2[7:0]
RTM3[7:0]
SECURE
SLEEP
SUM_CYCLES[5:0]
TMUX[4:0]
VERSION[7:0]
VREF_CAL
VREF_DIS
Location
20AA[4:0]
SFRB2[6]
2001[5:0]
2006[7:0]
201C[1]
201C[0]
2002[3]
20A9[6]
2004[7]
2004[3]
2060
2061
2062
2063
Rst
0
0
0
0
0
0
0
0
0
0
2
–
0
0
Wk
0
0
0
0
0
0
0
–
0
0
–
–
0
1
Dir
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
W
R
Description
RTC time correction bits. Only one bit may be pulsed at a
time. When pulsed, causes the RTC time value to be
incremented (or decremented) by an additional second
the next time the RTC_SEC register is clocked. The pulse
width may be any value. If an additional correction is
desired, the MPU must wait 2 seconds before pulsing one
of the bits again. Each write to one of these bits must be
preceded by a write to 201F (WE).
Real Time Monitor enable. When ‘0’, the RTM output is
low. This bit enables the 2 wire version of RTM
Four RTM probes. Before each CE code pass, the values
of these registers are serially output on the RTM pin. The
RTM registers are ignored when RTM_E=0.
Enables security provisions that prevent external reading
of Flash memory and CE program RAM. This bit is reset
on chip reset and may only be set. Attempts to write zero
are ignored.
Takes the 78M6612 to sleep mode. Ignored if system
power is present. The part will wake when the autowake
timer times out or when system power returns.
The number of pre-summer outputs summed in the final
summer.
Selects one of 32 signals for TMUXOUT.
The version index. This word may be read by firmware to
determine the silicon version.
Brings VREF to VREF pad. This feature is disabled when
VREF_DIS=1.
Disables the internal voltage reference.
[4:0]
0x00
0x02
0x04
0x06
0x08
0x0A
0x14
0x16
–
0x17
0x19
0x1B
0x1D
0x1F
VERSION[7:0]
0000 0110
Selected Signal
DGND (analog)
Reserved
Reserved
VBIAS (analog)
Reserved
Reserved
RTM (Real time
output from CE)
Not used
MUX_SYNC
CK_MPU
RTCLK_2P5
XFER_BUSY
[4:0]
0x01
0x03
0x05
0x07
0x09
0x0
B -
0x13
0x15
0x18
0x1
A
0x1
C
0x1
E
78M6612 Data Sheet
Selected Signal
Reserved
Reserved
Reserved
Not used
Reserved
Reserved
WDTR_E, comparator
1 Output AND V1LT3)
RXD, from optical in-
terface, after optional
inversion
CK_10M
Reserved
CE_BUSY
81
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