MAX15066EWE+T Maxim Integrated Products, MAX15066EWE+T Datasheet - Page 13

• Manufacturer Part Number: MAX15066EWE+T
• Description: DC/DC Switching Controllers 4A 12V 500kHz w/Integrated Switch
• Manufacturer: Maxim Integrated Products

Specifications of MAX15066EWE+T

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

capacitor’s ESL. Estimate the output-voltage ripple due
to the output capacitance, ESR, and ESL as follows:
where the output ripple due to output capacitance, ESR,
and ESL is:
and V
divider from LX to GND:
where V
The peak-to-peak inductor current (DI
When using ceramic capacitors, which generally have
low-ESR, DV
lytic capacitors, DV
capacitors for low ESR and low ESL at the switching fre-
quency of the converter. The ripple voltage due to ESL is
negligible when using ceramic capacitors.
As a general rule, a smaller inductor ripple current
results in less output ripple voltage. Since inductor
ripple current depends on the inductor value and
input voltage, the output ripple voltage decreases with
larger inductance and increases with higher input volt-
ages. However, the inductor ripple current also impacts
transient-response performance, especially at low V
V
tor current to slew faster, replenishing charge removed
from the output filter capacitors by a sudden load step.
Load-transient response also depends on the selected
output capacitance. During a load transient, the output
instantly changes by ESR x ∆I
can respond, the output deviates further, depending on
the inductor and output capacitor values. After a short
time, the controller responds by regulating the output
voltage back to the predetermined value.
Use higher C
light-load operation or transition between heavy load and
light load, triggering skip mode, causing output under-
OUT
V
RIPPLE
RIPPLE(ESL)
differentials. Low inductor values allow the induc-
LX
V
RIPPLE (ESL)
=
swings from V
V
∆
RIPPLE(C)
RIPPLE(C)
V
I
OUT
V
P P
RIPPLE(C)
RIPPLE(ESR)
−
______________________________________________________________________________________
can be approximated as an inductive
=
RIPPLE(ESR)
values for applications that require
Regulator with Internal Power Switches
(
V
IN
=
dominates. When using electro-
+
V
=
IN
High-Efficiency, 4A, Step-Down DC-DC
−
V
LX
RIPPLE(ESR)
8 C
V
to GND.
= ∆
OUT
L f
×
×
LOAD
×
ESL
I
∆
dominates. Use ceramic
OUT
P P
L
SW
)
I
−
P P
× 
. Before the controller
−


=
×
×
V
V
ESR
P-P
V
OUT
f
IN
SW
IN
+
) is:
×
V
RIPPLE(ESL)



ESL
L
IN
to
shooting or overshooting. When applying the load, limit
the output undershooting by sizing C
the following formula:
where ∆I L
gain bandwidth (or zero-crossing frequency), and ∆V
is the desired output undershooting. When removing the
load and entering skip mode, the device cannot control
output overshooting, since it has no sink current capabil-
ity; see the Skip Mode Frequency and Output Ripple
section to properly size C
A worst-case analysis in sizing the minimum output
capacitance takes the total energy stored in the inductor
into account, as well as the allowable sag/soar (under-
shoot/overshoot) voltage as follows:
where I
values of the load current during the worst-case load
dump, V
V
V
V
The terms (V
the maximum/minimum transient output voltage reached
during the transient, respectively.
Use these equations for initial output-capacitor selection.
Determine final values by testing a prototype or an evalu-
ation circuit under the worst-case conditions.
In skip mode, the switching frequency (f
ripple voltage (V
culated as follows:
t
current limit (0.58A, typ):
ON
C
C
FIN
SOAR
FIN
OUT(MIN)
OUT (MIN)
is the time needed for inductor current to reach SKIP
, and V
is the steady-state voltage after the transient,
OUT(MAX)
is the allowed voltage soar (overshoot) above
INIT
OAD
=
=
L
SAG
L
×
FIN
×
(
Skip Mode Frequency and Output Ripple
is the initial voltage prior to the transient,
V
V
(
(
I
I
FIN
2
is the total load change, f
2
2
INIT
OUT MAX
is the allowable voltage sag below V
OUT MAX
OUT_RIPPLE
C
t
+ V
ON
+
and I
OUT
V
−
(
(
SOAR
SOAR
(
=
V
FIN
L I
=
)
OUT(MIN)
)
−
×
−
V
)
3f
−
OUT
2
I
I
) and (V
IN
2
2
V
SKIP LIMIT
CO
−
OUT MIN
OUT MIN
SAG
) shown in Figure 2 are cal-
−
∆
V
I
2
V
under this circumstance.
LOAD
(
× ∆
(
INIT
−
)
OUT
2
are the initial and final
V
)
)
FIN
)
)
OUT
, voltage sag (undershoot)
, voltage soar (overshoot)
OUT
- V
SKIP
CO
SAG
according to
) and output
is the unity-
) represent
[1]
OUT
FIN
13
.