DP83257VF National Semiconductor, DP83257VF Datasheet - Page 101
![no-image](/images/manufacturer_photos/0/4/469/national_semiconductor_sml.jpg)
DP83257VF
Manufacturer Part Number
DP83257VF
Description
IC FDDI LAYER CTRLR 160PQFP
Manufacturer
National Semiconductor
Datasheet
1.DP83256VF.pdf
(144 pages)
Specifications of DP83257VF
Controller Type
physical layer controller
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
160-BFQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Supply
-
Interface
-
Other names
*DP83257VF
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DP83257VF
Manufacturer:
NVIDIA
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12 388
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V
GND ANALOG
V
GND CORE
V
GND ECL
V
GND ESD
V
GND IO
Symbol
N C
RES 0
RES 1
CC
CC
CC
CC
CC
6 0 Signal Descriptions
POWER AND GROUND
All power pins should be connected to a single
connected to a common 0V ground supply Bypassing and filtering requirements are given in a separate User Information
Document
SPECIAL CONNECT PINS
These are pins that have special connection requirements
No Connect (N C) pins should not be connected to anything This means not to power not to ground and not to each other
Reserved 0 (RES 0) pins must be connected to ground These pins are not used to supply device power so they do not need
to be filtered or bypassed
Reserved 1 (RES 1) pins must be connected to power These pins are not used to supply device power so they do not need
to be filtered or bypassed
Symbol
ANALOG
CORE
ECL
ESD
IO
49 53
18 19
48 50
51 52
57 58
Pin
54
84
85
Pin
I O
32
37
45
38
46
11
65
79
12
64
78
20
21
88
87
56
55
28
29
98
97
No Connect Pins should not be connected to anything This means not to power not to ground and
not to each other
Reserved 0 Pins must be connected to ground These pins are not used to supply device power so
they do not need to be filtered or bypassed
Reserved 1 Pins must be connected to power These pins are not used to supply device power so they
do not need to be filtered or bypassed
I O
Power Positive 5V power supply for the Clock Generation Module VCO
Ground Power supply return for the Clock Generation Module VCO
Power Positive 5V power supply for the core PLAYER section logic gates
Ground Power supply return for the core PLAYER section logic gates
Power Positive 5V power supply for the PLAYER
Ground Power supply return for the PLAYER
Power Positive 5V power supply for the PLAYER
Ground Power supply return for the PLAYER
Power Positive 5V power supply for the input output buffers
Ground Power supply return for the input output buffers
(Continued)
a
5V power supply using the recommended filtering All ground pins should be
101
Description
Description
a
a
device’s ECL logic gates
device’s ESD protection circuitry
a
a
device’s ECL logic gates
device’s ESD protection circuitry
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