DP83257VF National Semiconductor, DP83257VF Datasheet - Page 97
![no-image](/images/manufacturer_photos/0/4/469/national_semiconductor_sml.jpg)
DP83257VF
Manufacturer Part Number
DP83257VF
Description
IC FDDI LAYER CTRLR 160PQFP
Manufacturer
National Semiconductor
Datasheet
1.DP83256VF.pdf
(144 pages)
Specifications of DP83257VF
Controller Type
physical layer controller
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
160-BFQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Current - Supply
-
Interface
-
Other names
*DP83257VF
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DP83257VF
Manufacturer:
NVIDIA
Quantity:
12 388
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Symbol
AIP
AIC
AID7
AID6
AID5
AID4
AID3
AID2
AID1
AID0
BRP
BRC
BRD7
BRD6
BRD5
BRD4
BRD3
BRD2
BRD1
BRD0
6 0 Signal Descriptions
PHY PORT INTERFACE
The PHY Port Interface consists of I O signals used to connect the PLAYER
sublayer or other PLAYER
Port Interface and the B Request path from the second PHY Port Interface Each path consists of an odd parity bit a control
bit and two 4-bit symbols
Refer to section 3 3 the Configuration Switch for more information
Pin
10
13
14
15
16
17
70
69
68
67
66
63
62
61
60
59
6
7
8
9
I O
O
O
O
O
I
I
I
I
PHY Port A Indicate Parity A TTL output signal representing odd parity for the 10-bit wide Port A
Indicate signals (AIP AIC and AID
PHY Port A Indicate Control TTL output signal indicating that the two 4-bit symbols (AID
AID
PHY Port A Indicate Data TTL output signals representing the first 4-bit data control symbol
AID7 is the most significant bit and AID4 is the least significant bit of the first symbol
PHY Port A Indicate Data TTL output signals representing the second 4-bit data control symbol
AID3 is the most significant bit and AID0 is the least significant bit of the second symbol
PHY Port B Request Parity A TTL input signal representing odd parity for the 10-bit wide Port A
Request signals (BRP BRC and BRD
PHY Port B Request Control A TTL input signal indicating that the two 4-bit symbols (BRD
BRD
PHY Port B Request Data TTL input signals representing the first 4-bit data control symbol
BRD7 is the most significant bit and BRD4 is the least significant bit of the first symbol
PHY Port B Request Data TTL input signals representing the second 4-bit data control symbol
BRD3 is the most significant bit and BRD0 is the least significant bit of the second symbol
a
k
k
device The DP83256 Device has two PHY Port Interfaces The A Indicate path from one PHY
3 0
3 0
l
l
) are either control symbols (AIC
) are either control symbols (BRC
(Continued)
k
7 0
97
k
l
7 0
)
l
e
)
e
1) or data symbols (AIC
Description
1) or data symbols (BRC
a
device to the Media Access Control (MAC)
e
0)
e
0)
k
k
7 4
7 4
l
l
and
and
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