DP8522AV-25 National Semiconductor, DP8522AV-25 Datasheet - Page 38

• Manufacturer Part Number: DP8522AV-25
• Description: IC CTRLR 4M VRAM 25MHZ 68PLCC
• Manufacturer: National Semiconductor

Specifications of DP8522AV-25

• Controller Type: Video RAM Controller, Drivers
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 68-LCC (J-Lead)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Current - Supply: -
• Voltage - Supply: -
• Interface: -
• Other names: *DP8522AV-25

9 0 Programming and Resetting
Using this method various programming schemes can be
used For example if extra upper address bits are available
an unused high order address bit can be tied to the signal
ML Using this method one need only write to a page of
memory thus asserting the high order bit and in turn pro-
gramming the chip as shown in Figure 48
An I O port can also be used to assert ML After ML is
asserted a chip selected access can be performed to pro-
gram the chip After the chip selected access ML can be
negated through the I O port as shown in Figure 49
FIGURE 48 Programming the DP8520A 21A 22A
through the Address Bus Only
FIGURE 50 Programming the DP8520A 21A 22A on the First CPU Write after Power Up
FIGURE 47 CS Access Programming
TL F 9338– 99
(Continued)
38
Another simple way the chip can be programmed is the first
write after system reset This method requires only a flip-
flop and an OR gate as shown in Figure 50 At reset the flip-
flop is preset which pulls the Q output low Since WR is
negated ML is not enabled The first write access is used to
program the chip When WR is asserted ML is asserted
WR negated clocks the flip-flop negates ML and programs
the DP8520A 21A 22A with the address and ECAS0 avail-
able at that time CS does not need to be asserted using
this method
FIGURE 49 Programming the DP8520A 21A 22A
through the Address Bus and an I O Port
TL F 9338 – A1
TL F 9338 – 98
TL F 9338– A0