MC33389CDW Freescale Semiconductor, MC33389CDW Datasheet - Page 17
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MC33389CDW
Manufacturer Part Number
MC33389CDW
Description
IC SYSTEM BASE W/CAN 28-SOIC
Manufacturer
Freescale Semiconductor
Datasheet
1.MC33389DDWR2.pdf
(49 pages)
Specifications of MC33389CDW
Controller Type
System Basis Chip
Interface
CAN
Voltage - Supply
5.5 V ~ 18 V
Current - Supply
45mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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dedicated to car body applications. It includes three main
blocks:
TRANSMIT AND RECEIVE DATA (TX AND RX)
respectively) are connected to a microcontroller’s CAN
protocol handler. TX is an input and controls the CANH and
CANL line state (dominant when TX is LOW, recessive when
TX is HIGH). RX is an output and reports the bus state.
VOLTAGE REGULATOR ONE AND TWO
(V1 AND V2)
the microcontroller supply (nominal 5V supply).
peripherals supply (nominal 5V supply).
RESET (RST)
reset duration from SBC to microcontroller is 1ms. If longer
times are required, an external capacitor can be used. SBC
provides two RST output pull-up currents. A typical 30µA pull
up when Vreset is below 2.5V and a 300uA pull up when
reset voltage is higher than 2.5V. RST is also an input for the
SBC. It means the MC33389 is forced to Normal Request
mode after RST is released by the microcontroller
INTERRUPT (INT)
interrupt occurs. INT is enabled using the Interrupt Register
(INTR). When an interrupt occurs, INT stays LOW until the
interrupt source is cleared.
GROUND (GND)
MASTER IN/ SLAVE OUT (MISO)
interface. Data is sent from the SBC to the microcontroller
through the MISO pin.
Analog Integrated Circuit Device Data
Freescale Semiconductor
1. A dual voltage regulator
2. Reset, watchdog, wake-up inputs, cyclic wake-up
The System Basis Chip (SBC) is an integrated circuit
The RX and TX pins (receive data and transmit data pins,
The V1 pin is a 3% low drop voltage regulator dedicated to
The V2 pin is a low drop voltage regulator dedicated to the
The RST (reset) pin is an input/output pin. The typical
The Interrupt pin INT is an output that is set LOW when an
INT output also reports a wake-up event.
This pin is the ground of the integrated circuit.
MISO is the Master In Slave Out pin of the serial peripheral
FUNCTIONAL DESCRIPTION
FUNCTIONAL PIN DESCRIPTION
INTRODUCTION
Supplies
provided to supply the ECU microcontroller or peripherals,
with independent control and monitoring through SPI.
MASTER OUT/ SLAVE IN (MOSI)
interface. Control data from a microcontroller is received
through this pin.
SYSTEM CLOCK (SCLK)
communication.
CHIP SELECT (CS)
(SPI). When this pin is LOW, the SPI port of the device is
selected.
LEVEL 0-2 INPUTS (L0: L2)
the output of other ICs for external inputs. The input states
can be read by the SPI. These inputs can be used as wake-
up events for the SBC.
NO CONNECT (NC)
TERMINATION RESISTANCE (HIGH AND LOW?)
(RTH AND RTL)
are connected to these pins.
CAN HIGH AND CAN LOW OUTPUTS
(CANH AND CANL)
CAN bus lines. They are controlled by TX input level, and the
state of CANH and CANL is reported through RX output.
VOLTAGE BATTERY (VBAT)
VOLTAGE REGULATOR THREE (V3)
external contacts or relays.
3. CAN low speed fault tolerant physical interface
MOSI is the Master Out Slave In pin of the serial peripheral
This pin clocks the internal shift registers for SPI
CS is the Chip Select pin of the serial peripheral interface
The L0: L2 pins can be connected to contact switches or
No pin connection.
External CAN bus high and low termination resistance pins
The CAN High and CAN Low pins are the interfaces to the
This pin is the voltage supply from the battery.
This pin is a 10 Ω switch to VBAT, which is used to supply
Two low drop regulators and one switch to V
FUNCTIONAL DESCRIPTION
INTRODUCTION
BAT
are
33389
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