PIC16F877A-I/P Microchip Technology Inc., PIC16F877A-I/P Datasheet - Page 114
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC16F877A-I/P
Manufacturer Part Number
PIC16F877A-I/P
Description
40 PIN, 7 KB FLASH, 368 RAM, 33 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F877A-IP.pdf
(218 pages)
Specifications of PIC16F877A-I/P
A/d Inputs
8-Channel, 10-Bit
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
33
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
14K Bytes
Ram Size
368 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F877A-I/P
Manufacturer:
OMRON
Quantity:
100
Company:
Part Number:
PIC16F877A-I/P
Manufacturer:
MIC
Quantity:
5 380
Company:
Part Number:
PIC16F877A-I/P
Manufacturer:
MIC
Quantity:
5 380
Part Number:
PIC16F877A-I/P
Manufacturer:
MICROCHIP
Quantity:
20 000
Company:
Part Number:
PIC16F877A-I/PT
Manufacturer:
MICROCHIP
Quantity:
9 100
Company:
Part Number:
PIC16F877A-I/PT
Manufacturer:
AVAGO
Quantity:
84
Company:
Part Number:
PIC16F877A-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC16F87X
REGISTER 11-2:
The ADRESH:ADRESL registers contain the 10-bit
result of the A/D conversion. When the A/D conversion
is complete, the result is loaded into this A/D result reg-
ister pair, the GO/DONE bit (ADCON0<2>) is cleared
and the A/D interrupt flag bit ADIF is set. The block dia-
gram of the A/D module is shown in Figure 11-1.
After the A/D module has been configured as desired,
the selected channel must be acquired before the con-
version is started. The analog input channels must
have their corresponding TRIS bits selected as inputs.
DS30292C-page 112
bit 7
bit 6-4
bit 3-0
ADCON1 REGISTER (ADDRESS 9Fh)
A = Analog input
bit 7
ADFM: A/D Result Format Select bit
1 = Right justified. 6 Most Significant bits of ADRESH are read as ‘0’.
0 = Left justified. 6 Least Significant bits of ADRESL are read as ‘0’.
Unimplemented: Read as '0'
PCFG3:PCFG0: A/D Port Configuration Control bits:
Note 1: These channels are not available on PIC16F873/876 devices.
Legend:
R = Readable bit
- n = Value at POR
PCFG3:
PCFG0
0000
0001
0010
0011
0100
0101
011x
1000
1001
1010
1011
1100
1101
1110
1111
ADFM
U-0
2: This column indicates the number of analog channels available as A/D inputs and
AN7
the number of analog channels used as voltage reference inputs.
RE2
A
A
D
D
D
D
D
A
D
D
D
D
D
D
D
(1)
U-0
—
AN6
RE1
D = Digital I/O
D
D
D
D
D
D
D
D
D
D
D
D
A
A
A
(1)
AN5
R/W-0
RE0
A
A
D
D
D
D
D
A
A
A
A
D
D
D
D
—
W = Writable bit
’1’ = Bit is set
(1)
AN4
RA5
A
A
A
A
D
D
D
A
A
A
A
A
D
D
D
U-0
—
To determine sample time, see Section 11.1. After this
acquisition time has elapsed, the A/D conversion can
be started.
V
V
V
V
V
V
V
V
V
AN3
RA3
REF
REF
REF
REF
REF
REF
REF
REF
REF
A
A
A
D
A
D
+
+
+
+
+
+
+
+
+
PCFG3
V
V
V
V
V
AN2
RA2
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
REF
REF
REF
REF
REF
A
A
A
A
D
D
D
A
A
D
-
-
-
-
-
AN1
RA1
A
A
A
A
A
A
D
A
A
A
A
A
A
D
D
PCFG2
R/W-0
AN0
RA0
D
A
A
A
A
A
A
A
A
A
A
A
A
A
A
2001 Microchip Technology Inc.
V
V
RA3
V
RA3
V
RA3
V
RA3
V
RA3
RA3
RA3
RA3
V
RA3
REF
x = Bit is unknown
PCFG1
DD
DD
DD
DD
DD
DD
R/W-0
+
V
RA2
RA2
RA2
RA2
RA2
V
V
V
V
V
V
V
V
V
V
REF
SS
SS
SS
SS
SS
SS
SS
SS
SS
SS
-
PCFG0
R/W-0
Refs
C
HAN
8/0
7/1
5/0
4/1
3/0
2/1
0/0
6/2
6/0
5/1
4/2
3/2
2/2
1/0
1/2
bit 0
(2)
/