74HCT02N,652 Philips Semiconductors, 74HCT02N,652 Datasheet

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74HCT02N,652

Manufacturer Part Number
74HCT02N,652
Description
NOR GATE; PDIP; TTL LOGIC; -40; +125 DRIVE O/P; 3.5 PF (TYP.); 9 NS (TYP.)
Manufacturer
Philips Semiconductors
Datasheet
1.74HC02N652.pdf (7 pages)

Specifications of 74HCT02N,652

Capacitance, Input
3.5 pF (Typ.)
Circuit Type
High Speed, Low-Power Schottky, Silicon Gate
Current, Supply
40 μA
Function Type
2-Inputs
Logic Function
NOR Gate
Logic Type
CMOS/TTL
Number Of Circuits
Quad
Package Type
DIP-14
Temperature, Operating, Range
-40 to +125 °C
Time, Delay, Propagation (high-to-low Level Output)
9 ns (Typ.)
Time, Delay, Propagation (low-to-high Level Output)
9 ns (Typ.)
Voltage, Supply
5 V
Output Capability
standard
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
1. General description
2. Features
3. Ordering information
Table 1.
Type number
74HC02N
74HCT02N
74HC02D
74HCT02D
74HC02DB
74HCT02DB
74HC02PW
74HCT02PW
74HC02BQ
74HCT02BQ
Ordering information
Package
Temperature range
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
The 74HC02; 74HCT02 are high-speed Si-gate CMOS devices that comply with JEDEC
standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL).
The 74HC02; 74HCT02 provides a quad 2-input NOR function.
I
I
I
I
74HC02; 74HCT02
Quad 2-input NOR gate
Input levels:
ESD protection:
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
N
N
N
N
For 74HC02: CMOS level
For 74HCT02: TTL level
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Name
DIP14
SO14
SSOP14
TSSOP14
DHVQFN14
Description
plastic dual in-line package; 14 leads (300 mil)
plastic small outline package; 14 leads; body width
3.9 mm
plastic shrink small outline package; 14 leads; body
width 5.3 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5
3
0.85 mm
Product data sheet
Version
SOT27-1
SOT108-1
SOT337-1
SOT402-1
SOT762-1

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74HCT02N,652 Summary of contents

Page 1

Quad 2-input NOR gate 1. General description The 74HC02; 74HCT02 are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7A. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC02; 74HCT02 provides a quad 2-input ...

Page 2

NXP Semiconductors 6. Functional description [1] Table 3. Function table Input [ HIGH voltage level LOW voltage level don’t care. 7. Limiting values Table 4. Limiting values In accordance with ...

Page 3

NXP Semiconductors Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter t/ V input transition rise and fall rate 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced ...

Page 4

NXP Semiconductors Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74HCT02 V HIGH-level input voltage V LOW-level V = ...

Page 5

NXP Semiconductors Table 7. Dynamic characteristics GND = pF; for load circuit see L Symbol Parameter Conditions 74HCT02 t propagation delay nA nY; see transition time ...

Page 6

NXP Semiconductors Test data is given in Table Definitions test circuit termination resistance should be equal to output impedance load capacitance including jig and probe capacitance. L Fig 7. Load circuitry for measuring switching ...

Page 7

NXP Semiconductors 12. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. ...

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