PIC18F4580-I/P Microchip Technology Inc., PIC18F4580-I/P Datasheet - Page 29

• Manufacturer Part Number: PIC18F4580-I/P
• Description: 40 PIN, 32 KB FLASH, 1536 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F4580-I/P

• A/d Inputs: 11-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 36
• Interface: CAN/I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 32K Bytes
• Ram Size: 1.5K Bytes
• Speed: 40 MHz
• Timers: 1-8 bit, 3-16 bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

3.7
On power-up, the time-out sequence is as follows:
First, PWRT time-out is invoked after the POR time
delay has expired, then OST is activated. The total
time-out will vary based on oscillator configuration and
the status of the PWRT. For example, in RC mode with
the PWRT disabled, there will be no time-out at all.
Figure 3-3, Figure 3-4, Figure 3-5, Figure 3-6 and
Figure 3-7 depict time-out sequences on power-up.
TABLE 3-1:
REGISTER 3-1:
TABLE 3-2:
 2004 Microchip Technology Inc.
Note 1:
HS with PLL enabled
Power-on Reset
MCLR Reset during normal
operation
Software Reset during normal
operation
Stack Full Reset during normal
operation
Stack Underflow Reset during
normal operation
MCLR Reset during Sleep
WDT Reset
WDT Wake-up
Brown-out Reset
Interrupt wake-up from Sleep
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’
Note 1:
Configuration
External RC
HS, XT, LP
2:
Oscillator
Time-out Sequence
EC
2 ms = Nominal time required for the 4x PLL to lock.
72 ms is the nominal Power-up Timer delay.
When the wake-up is due to an interrupt and the GIEH or GIEL bits are set, the PC is loaded with the
interrupt vector (000008h or 000018h).
Condition
TIME-OUT IN VARIOUS SITUATIONS
STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR
RCON REGISTER
(1)
RCON REGISTER BITS AND POSITIONS
bit 7
R/W-0
72 ms + 1024 T
IPEN
72 ms + 1024 T
PWRTEN = 0
72 ms
72 ms
Program
PC + 2
Counter
PC + 2
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
U-0
—
OSC
Power-up
(1)
OSC
+ 2 ms 1024 T
0--1 110q
0--0 011q
0--0 011q
0--0 011q
0--0 011q
0--0 011q
0--0 011q
0--1 101q
0--1 110q
0--1 101q
U-0
Register
—
(2)
RCON
PWRTEN = 1
1024 T
OSC
—
—
R/W-1
OSC
RI
+ 2 ms 72 ms + 1024 T
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire.
Bringing MCLR high will begin execution immediately
(Figure 3-5). This is useful for testing purposes or to
synchronize more than one PIC18FXX8 device
operating in parallel.
Table 3-2 shows the Reset conditions for some Special
Function Registers, while Table 3-3 shows the Reset
conditions for all registers.
RI
1
u
0
u
u
u
u
u
1
u
TO
1
u
u
u
u
1
0
0
1
1
R/W-1
72 ms + 1024 T
TO
PD
1
u
u
u
u
0
1
0
1
0
Brown-out
72 ms
72 ms
POR
0
u
u
1
1
u
u
u
u
u
R/W-1
OSC
PD
(2)
BOR
PIC18FXX8
OSC
+ 2 ms 1024 T
0
u
u
1
1
u
u
u
0
u
STKFUL
R/W-0
POR
Oscillator Switch
u
u
u
u
1
u
u
u
u
u
DS41159D-page 27
Wake-up from
1024 T
Sleep or
OSC
—
—
STKUNF
R/W-1
OSC
BOR
+ 2 ms
u
u
u
1
u
u
u
u
u
u
bit 0