DSPIC30F3014-30I/P Microchip Technology Inc., DSPIC30F3014-30I/P Datasheet - Page 25
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DSPIC30F3014-30I/P
Manufacturer Part Number
DSPIC30F3014-30I/P
Description
DSP, 16-Bit, 24 KB Flash, 2KB RAM, 30 I/O, PDIP-40
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC30F3014-30IP.pdf
(220 pages)
Specifications of DSPIC30F3014-30I/P
A/d Inputs
13-Channels, 12-Bit
Cpu Speed
30 MIPS
Eeprom Memory
1K Bytes
Input Output
30
Interface
CAN, I2C, SPI, UART/USART
Ios
30
Memory Type
Flash
Number Of Bits
16
Package Type
40-pin PDIP
Programmable Memory
24K Bytes
Ram Size
2K Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
2.5-5.5
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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3.0
3.1
The program address space is 4M instruction words. It
is addressable by a 24-bit value from either the 23-bit
PC, table instruction Effective Address (EA), or data
space EA, when program space is mapped into data
space as defined by Table 3-1. Note that the program
space address is incremented by two between succes-
sive program words in order to provide compatibility
with data space addressing.
FIGURE 3-1:
© 2007 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the “dsPIC30F Family Reference
Manual” (DS70046). For more information on the device
instruction set and programming, refer to the “dsPIC30F/
33F Programmer’s Reference Manual” (DS70157).
MEMORY ORGANIZATION
Program Address Space
Reset – GOTO Instruction
Alternate Vector Table
Reset – Target Address
Interrupt Vector Table
Device Configuration
Program Memory
(8K instructions)
UNITID (32 instr.)
Data EEPROM
User Flash
(Read ‘0’s)
Reserved
Registers
Reserved
DEVID (2)
(1 Kbyte)
Reserved
Reserved
Reserved
dsPIC30F3014 PROGRAM
SPACE MEMORY MAP
000000
000002
000004
00007E
000080
000084
0000FE
000100
003FFE
004000
7FFBFE
7FFC00
7FFFFE
800000
8005BE
8005C0
8005FE
800600
F7FFFE
F80000
F8000E
F80010
FEFFFE
FF0000
FF0002
User program space access is restricted to the lower
4M instruction word address range (0x000000 to
0x7FFFFE) for all accesses other than TBLRD/TBLWT,
which use TBLPAG<7> to determine user or configura-
tion space access. In Table 3-1, Program Space
Address Construction, bit 23 allows access to the
Device ID, the User ID and the Configuration bits.
Otherwise, bit 23 is always clear.
FIGURE 3-2:
dsPIC30F3014/4013
Reset – GOTO Instruction
Alternate Vector Table
Reset – Target Address
Interrupt Vector Table
Program Memory
(16K instructions)
Device Configuration
UNITID (32 instr.)
Data EEPROM
User Flash
(Read ‘0’s)
Reserved
Registers
Reserved
DEVID (2)
(1 Kbyte)
Reserved
Reserved
Reserved
dsPIC30F4013 PROGRAM
SPACE MEMORY MAP
DS70138E-page 23
000000
000002
000004
00007E
000080
000084
0000FE
000100
007FFE
004000
7FFBFE
7FFC00
7FFFFE
800000
8005BE
8005C0
8005FE
800600
F7FFFE
F80000
F8000E
F80010
FEFFFE
FF0000
FF0002
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