PIC18LF4520-I/PT Microchip Technology Inc., PIC18LF4520-I/PT Datasheet - Page 69
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PIC18LF4520-I/PT
Manufacturer Part Number
PIC18LF4520-I/PT
Description
44 Pin, 32 KB Flash, 1536 RAM, 36 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18LF4520-IPT.pdf
(390 pages)
Specifications of PIC18LF4520-I/PT
A/d Inputs
13-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin TQFP
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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5.3.5
The Status register, shown in Register 5-2, contains the
arithmetic status of the ALU. As with any other SFR, it
can be the operand for any instruction.
If the Status register is the destination for an instruction
that affects the Z, DC, C, OV or N bits, the results of the
instruction are not written; instead, the Status register
is updated according to the instruction performed.
Therefore, the result of an instruction with the Status
register as its destination may be different than
intended. As an example, CLRF STATUS will set the Z
bit and leave the remaining status bits unchanged
(‘000u u1uu’).
REGISTER 5-2:
2004 Microchip Technology Inc.
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
STATUS REGISTER
STATUS REGISTER
bit 7
Unimplemented: Read as ‘0’
N: Negative bit
This bit is used for signed arithmetic (2’s complement). It indicates whether the result was
negative (ALU MSB = 1).
1 = Result was negative
0 = Result was positive
OV: Overflow bit
This bit is used for signed arithmetic (2’s complement). It indicates an overflow of the 7-bit
magnitude which causes the sign bit (bit 7 of the result) to change state.
1 = Overflow occurred for signed arithmetic (in this arithmetic operation)
0 = No overflow occurred
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit Carry/borrow bit
For ADDWF, ADDLW, SUBLW and SUBWF instructions:
1 = A carry-out from the 4th low-order bit of the result occurred
0 = No carry-out from the 4th low-order bit of the result
C: Carry/borrow bit
For ADDWF, ADDLW, SUBLW and SUBWF instructions:
1 = A carry-out from the Most Significant bit of the result occurred
0 = No carry-out from the Most Significant bit of the result occurred
Legend:
R = Readable bit
-n = Value at POR
Note:
Note:
U-0
—
For borrow, the polarity is reversed. A subtraction is executed by adding the 2’s
complement of the second operand. For rotate (RRF, RLF) instructions, this bit is
loaded with either bit 4 or bit 3 of the source register.
For borrow, the polarity is reversed. A subtraction is executed by adding the 2’s
complement of the second operand. For rotate (RRF, RLF) instructions, this bit is
loaded with either the high or low-order bit of the source register.
U-0
—
PIC18F2420/2520/4420/4520
U-0
Preliminary
—
W = Writable bit
‘1’ = Bit is set
R/W-x
It is recommended that only BCF, BSF, SWAPF, MOVFF
and MOVWF instructions are used to alter the Status
register, because these instructions do not affect the Z,
C, DC, OV or N bits in the Status register.
For other instructions that do not affect Status bits, see
the instruction set summaries in Table 24-2 and
Table 24-3.
N
Note:
R/W-x
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
OV
The C and DC bits operate as the borrow
and digit borrow bits, respectively, in
subtraction.
R/W-x
Z
x = Bit is unknown
R/W-x
DC
DS39631A-page 67
R/W-x
C
bit 0
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