DSPIC33FJ256MC710-I/PF Microchip Technology Inc., DSPIC33FJ256MC710-I/PF Datasheet - Page 189
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DSPIC33FJ256MC710-I/PF
Manufacturer Part Number
DSPIC33FJ256MC710-I/PF
Description
16 BIT MCU/DSP 100LD 40MIPS 256KB FLASH
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC33FJ256MC710-IPF.pdf
(371 pages)
Specifications of DSPIC33FJ256MC710-I/PF
A/d Inputs
24-Channels, 12-Bit
Comparators
8
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
85
Interface
I2C/SPI/UART
Ios
85
Memory Type
Flash
Number Of Bits
16
Package Type
100-pin TQFP
Programmable Memory
256K Bytes
Ram Size
30K Bytes
Timers
9-16-bit, 4-32-bit
Voltage, Range
3-3.6
Lead Free Status / Rohs Status
RoHS Compliant part
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REGISTER 15-5:
© 2006 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-8
bit 7-4
bit 3-0
Note 1:
PEN4H
R/W-1
U-0
—
(1)
Reset condition of the PENxH and PENxL bits depends on the value of the PWMPIN Configuration bit in
the FPOR Configuration register.
Unimplemented: Read as ‘0’
PMOD<4:1>: PWM I/O Pair Mode bits
1 = PWM I/O pin pair is in the Independent PWM Output mode
0 = PWM I/O pin pair is in the Complementary Output mode
PEN4H:PEN1H: PWMxH I/O Enable bits
1 = PWMxH pin is enabled for PWM output
0 = PWMxH pin disabled, I/O pin becomes general purpose I/O
PEN4L:PEN1L: PWMxL I/O Enable bits
1 = PWMxL pin is enabled for PWM output
0 = PWMxL pin disabled, I/O pin becomes general purpose I/O
PEN3H
R/W-1
U-0
—
PWMCON1: PWM CONTROL REGISTER 1
(1)
W = Writable bit
‘1’ = Bit is set
PEN2H
R/W-1
U-0
—
(1)
PEN1H
R/W-1
U-0
Preliminary
—
(1)
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PEN4L
PMOD4
R/W-0
R/W-1
(1)
PEN3L
PMOD3
R/W-0
R/W-1
(1)
x = Bit is unknown
PEN2L
PMOD2
dsPIC33F
R/W-0
R/W-1
(1)
DS70165D-page 187
PEN1L
PMOD1
R/W-0
R/W-1
bit 8
bit 0
(1)
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