DSPIC30F6015-30I/PT Microchip Technology Inc., DSPIC30F6015-30I/PT Datasheet - Page 49

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DSPIC30F6015-30I/PT

Manufacturer Part Number
DSPIC30F6015-30I/PT
Description
16 BIT MCU/DSP 64LD 30MIPS 144 KB FLASH
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet

Specifications of DSPIC30F6015-30I/PT

A/d Inputs
16-Channels, 10-Bit
Cpu Speed
30 MIPS
Eeprom Memory
4K Bytes
Input Output
52
Interface
CAN, I2C, SPI, UART/USART
Ios
52
Memory Type
Flash
Number Of Bits
16
Package Type
64-pin TQFP
Programmable Memory
144K Bytes
Ram Size
8K Bytes
Timers
5-16-bit, 2-32-bit
Voltage, Range
2.5-5.5
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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6.0
The dsPIC30F family of devices contains internal
program Flash memory for executing user code. There
are two methods by which the user can program this
memory:
1.
2.
6.1
dsPIC30F devices can be serially programmed while in
the end application circuit. This is simply done with two
lines for Programming Clock and Programming Data
(which are named PGC and PGD, respectively), and
three other lines for Power (V
Master Clear (MCLR). This allows customers to manu-
facture boards with unprogrammed devices and then
program the microcontroller just before shipping the
product. This also allows the most recent firmware or a
custom firmware to be programmed.
FIGURE 6-1:
© 2006 Microchip Technology Inc.
Note: This data sheet summarizes features of this
group of dsPIC30F devices and is not intended to be
a complete reference source. For more information
on the CPU, peripherals, register descriptions and
general device functionality, refer to the “dsPIC30F
Family Reference Manual” (DS70046). For more
information on the device instruction set and pro-
gramming, refer to the “dsPIC30F/33F Programmers
Reference Manual” (DS70157).
In-Circuit Serial Programming™ (ICSP™)
Run-Time Self-Programming (RTSP)
FLASH PROGRAM MEMORY
In-Circuit Serial Programming
(ICSP)
User/Configuration
Space Select
ADDRESSING FOR TABLE AND NVM REGISTERS
DD
Using
NVMADR
Addressing
Using
Table
Instruction
), Ground (V
Using
Program
Counter
1/0
1/0
0
SS
) and
TBLPAG Reg
NVMADRU Reg
8 bits
8 bits
Program Counter
dsPIC30F6010A/6015
6.2
RTSP is accomplished using TBLRD (table read) and
TBLWT (table write) instructions.
With RTSP, the user may erase program memory,
32 instructions (96 bytes) at a time and can write
time.
6.3
The TBLRDL and the TBLWTL instructions are used to
read or write to bits<15:0> of program memory.
TBLRDL and TBLWTL can access program memory in
Word or Byte mode.
The TBLRDH and TBLWTH instructions are used to read
or write to bits<23:16> of program memory. TBLRDH
and TBLWTH can access program memory in Word or
Byte mode.
A 24-bit program memory address is formed using
bits<7:0> of the TBLPAG register and the Effective
Address (EA) from a W register specified in the table
instruction, as shown in Figure 6-1.
program memory data, 32 instructions (96 bytes) at a
24 bits
24-bit EA
NVMADR Reg EA
Working Reg EA
Run-Time Self-Programming
(RTSP)
Table Instruction Operation Summary
16 bits
16 bits
0
Byte
Select
DS70150B-page 47

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