PIC12F683-E/SN Microchip Technology Inc., PIC12F683-E/SN Datasheet - Page 53
PIC12F683-E/SN
Manufacturer Part Number
PIC12F683-E/SN
Description
8 PIN, 3.5 KB FLASH, 128 RAM, 6 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC12F683-ESN.pdf
(176 pages)
Specifications of PIC12F683-E/SN
A/d Inputs
4-Channel, 10-Bit
Comparators
1
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
5
Memory Type
Flash
Number Of Bits
8
Package Type
8-pin SOIC-N
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC12F683-E/SN
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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8.0
Comparators are used to interface analog circuits to a
digital circuit by comparing two analog voltages and
providing a digital indication of their relative magnitudes.
The comparators are very useful mixed signal building
blocks because they provide analog functionality
independent of the program execution. The analog
comparator module includes the following features:
• Multiple comparator configurations
• Comparator output is available internally/externally
• Programmable output polarity
• Interrupt-on-change
• Wake-up from Sleep
• Timer1 gate (count enable)
• Output synchronization to Timer1 clock input
• Programmable voltage reference
8.1
The comparator is shown in Figure 8-1 along with the
relationship between the analog input levels and the
digital output. When the analog voltage at V
than the analog voltage at V
comparator is a digital low level. When the analog
voltage at V
V
FIGURE 8-2:
© 2006 Microchip Technology Inc.
IN
-, the output of the comparator is a digital high level.
COMPARATOR MODULE
Comparator Overview
IN
+ is greater than the analog voltage at
Note 1: Comparator output is latched on falling edge of Timer1 clock source.
2: Q1 and Q3 are phases of the four-phase system clock (F
3: Q1 is held high during Sleep mode.
COMPARATOR OUTPUT BLOCK DIAGRAM
CINV
IN
-, the output of the
Q3*RD CMCON0
clock source
Timer1
IN
Q1
+ is less
(1)
Reset
EN
D
D
EN
D
CL
Q
Q
Q
FIGURE 8-1:
Output
Note:
V
V
V
V
IN
IN
IN
IN
RD CMCON0
+
-
-
+
CMSYNC
The black areas of the output of the
comparator represents the uncertainty
due to input offsets and response time.
OSC
0
1
).
+
–
SINGLE COMPARATOR
PIC12F683
To Timer1 Gate
To COUT pin
To Data Bus
Set CMIF bit
DS41211C-page 51
Output
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