PIC16C73A-04/SP Microchip Technology Inc., PIC16C73A-04/SP Datasheet - Page 38

• Manufacturer Part Number: PIC16C73A-04/SP
• Description: 28 PIN, 7 KB OTP, 192 RAM, 22 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16C73A-04/SP

• A/d Inputs: 5-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 22
• Interface: I2C/SPI/USART
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 7K Bytes
• Ram Size: 192 Bytes
• Speed: 4 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2.5-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16C7X
4.2.2.7
This register contains the CCP2 interrupt flag bit.
FIGURE 4-15: PIR2 REGISTER (ADDRESS 0Dh)
DS30390E-page 38
bit7
bit 7-1: Unimplemented: Read as '0'
bit 0:
U-0
—
Interrupt flag bits get set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the
global enable bit, GIE (INTCON<7>). User software should ensure the appropriate interrupt flag bits are clear prior to
enabling an interrupt.
PIR2 REGISTER
Applicable Devices
72 73 73A 74 74A 76 77
CCP2IF: CCP2 Interrupt Flag bit
Capture Mode
1 = A TMR1 register capture occurred (must be cleared in software)
0 = No TMR1 register capture occurred
Compare Mode
1 = A TMR1 register compare match occurred (must be cleared in software)
0 = No TMR1 register compare match occurred
PWM Mode
Unused
U-0
—
U-0
—
U-0
—
U-0
—
U-0
—
.
Note:
U-0
—
CCP2IF
Interrupt flag bits get set when an interrupt
condition occurs regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>). User soft-
ware should ensure the appropriate inter-
rupt flag bits are clear prior to enabling an
interrupt.
R/W-0
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
1997 Microchip Technology Inc.
read as ‘0’