PIC16C74B-20/L Microchip Technology Inc., PIC16C74B-20/L Datasheet - Page 130

• Manufacturer Part Number: PIC16C74B-20/L
• Description: 44 PIN, 7 KB OTP, 192 RAM, 33 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16C74B-20/L

• A/d Inputs: 8-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 33
• Interface: I2C/SPI/USART
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 44-pin PLCC
• Programmable Memory: 7K Bytes
• Ram Size: 192 Bytes
• Speed: 4 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2.5-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16C63A/65B/73B/74B
FIGURE 16-12:
TABLE 16-8:
DS30605C-page 130
Note 1: Specification 73A is only required if specifications 71A and 72A are used.
Param
† Data in “Typ” column is at 5 V, 25°C unless otherwise stated. These parameters are for design guidance only and
71A
72A
73A
No.
Note:
70
71
72
73
74
75
76
78
79
80
(CKP = 0)
(CKP = 1)
SDI
SCK
SDO
are not tested.
SS
SCK
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TscR
TscF
TscH2doV,
TscL2doV
B
Refer to Figure 16-4 for load conditions.
Symbol
2
B
EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 0)
SS↓ to SCK↓ or SCK↑ input
SCK input high time
(Slave mode)
SCK input low time
(Slave mode)
Setup time of SDI data input to SCK edge
Last clock edge of Byte1 to the 1st clock
edge of Byte2
Hold time of SDI data input to SCK edge
SDO data output rise time PIC16CXX
SDO data output fall time
SCK output rise time
(Master mode)
SCK output fall time (Master mode)
SDO data output valid
after SCK edge
EXAMPLE SPI MASTER MODE TIMING (CKE = 0)
70
80
71
73
Characteristic
MSb IN
MSb
74
72
75, 76
Continuous
Single Byte
Continuous
Single Byte
PIC16LCXX
PIC16CXX
PIC16LCXX
PIC16CXX
PIC16LCXX
BIT6 - - - - - -1
BIT6 - - - -1
1.25T
1.25T
1.5T
78
79
Min
T
100
100
CY
40
40
CY
CY
—
—
—
—
—
—
—
—
CY
+ 40
+ 30
+ 30
LSb
79
78
LSb IN
Typ† Max Units
10
20
10
10
20
10
—
—
—
—
—
—
—
—
—
—
 2000 Microchip Technology Inc.
100
25
45
25
25
45
25
50
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 1)
Conditions