PIC16F676-I/P Microchip Technology Inc., PIC16F676-I/P Datasheet - Page 45

• Manufacturer Part Number: PIC16F676-I/P
• Description: 14 PIN, 1.75 KB FLASH, 64 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F676-I/P

• Comparators: 1
• Cpu Speed: 5 MIPS
• Eeprom Memory: 128 Bytes
• Input Output: 12
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 14-pin PDIP
• Programmable Memory: 1.75K Bytes
• Ram Size: 64 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

7.0
The analog-to-digital converter (A/D) allows conversion
of an analog input signal to a 10-bit binary representa-
tion of that signal. The PIC16F676 has eight analog
inputs, multiplexed into one sample and hold circuit.
FIGURE 7-1:
7.1
There are three registers available to control the
functionality of the A/D module:
1.
2.
3.
7.1.1
The ANS7:ANS0 bits (ANSEL<7:0>) and the TRISA
bits control the operation of the A/D port pins. Set the
corresponding TRISA bits to set the pin output driver to
its high impedance state. Likewise, set the correspond-
ing ANS bit to disable the digital input buffer.
7.1.2
There are eight analog channels on the PIC16F676,
AN0
(ADCON0<4:2>) control which channel is connected to
the sample and hold circuit.
 2003 Microchip Technology Inc.
Note:
ADCON0 (Register 7-1)
ADCON1 (Register 7-2)
ANSEL (Register 7-3)
through
ANALOG-TO-DIGITAL
CONVERTER (A/D) MODULE
(PIC16F676 ONLY)
A/D Configuration and Operation
Analog voltages on any pin that is defined
as a digital input may cause the input
buffer to conduct excess current.
ANALOG PORT PINS
CHANNEL SELECTION
RA1/AN1/V
AN7.
A/D BLOCK DIAGRAM
RC0/AN4
RA4/AN3
RC1/AN5
RC2/AN6
RC3/AN7
RA0/AN0
RA2/AN2
The
REF
CHS2:CHS0
CHS2:CHS0
V
REF
bits
V
DD
GO/DONE
VCFG = 0
VCFG = 1
ADON
The output of the sample and hold is connected to the
input of the converter. The converter generates a
binary result via successive approximation and stores
the result in a 10-bit register. The voltage reference
used in the conversion is software selectable to either
V
shows the block diagram of the A/D on the PIC16F676.
7.1.3
There are two options for the voltage reference to the
A/D converter: either V
applied to V
controls the voltage reference selection. If VCFG is set,
then the voltage on the V
otherwise, V
7.1.4
The A/D conversion cycle requires 11 T
of the conversion clock is software selectable via the
ADCS bits (ADCON1<6:4>). There are seven possible
clock options:
• F
• F
• F
• F
• F
• F
• F
For correct conversion, the A/D conversion clock
(1/T
1.6 µs. Table 7-1 shows a few T
selected frequencies.
V
DD
SS
OSC
OSC
OSC
OSC
OSC
OSC
RC
AD
ADC
or a voltage applied by the V
) must be selected to ensure a minimum T
(dedicated internal oscillator)
/2
/4
/8
/16
/32
/64
ADFM
VOLTAGE REFERENCE
CONVERSION CLOCK
REF
DD
PIC16F630/676
is the reference.
is used. The VCFG bit (ADCON0<6>)
ADRESH ADRESL
DD
is used, or an analog voltage
10
10
REF
pin is the reference;
AD
REF
DS40039C-page 43
calculations for
AD
pin. Figure 7-1
. The source
AD
of