PIC16F676-I/P Microchip Technology Inc., PIC16F676-I/P Datasheet - Page 79

• Manufacturer Part Number: PIC16F676-I/P
• Description: 14 PIN, 1.75 KB FLASH, 64 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F676-I/P

• Comparators: 1
• Cpu Speed: 5 MIPS
• Eeprom Memory: 128 Bytes
• Input Output: 12
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 14-pin PDIP
• Programmable Memory: 1.75K Bytes
• Ram Size: 64 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

RLF
Syntax:
Operands:
Operation:
Status Affected:
Description:
RETURN
Syntax:
Operands:
Operation:
Status Affected:
Description:
RRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
 2003 Microchip Technology Inc.
Rotate Left f through Carry
[ label ] RLF
0 ≤ f ≤ 127
d ∈ [0,1]
See description below
C
The contents of register 'f' are rotated
one bit to the left through the Carry
Flag. If 'd' is 0, the result is placed in
the W register. If 'd' is 1, the result is
stored back in register 'f'.
Return from Subroutine
[ label ]
None
TOS → PC
None
Return from subroutine. The stack
is POPed and the top of the stack
(TOS) is loaded into the program
counter. This is a two-cycle
instruction.
Rotate Right f through Carry
[ label ]
0 ≤ f ≤ 127
d ∈ [0,1]
See description below
C
The contents of register 'f' are
rotated one bit to the right through
the Carry Flag. If 'd' is 0, the result
is placed in the W register. If 'd' is
1, the result is placed back in
register 'f'.
C
C
RETURN
RRF f,d
f,d
Register f
Register f
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Description:
SUBLW
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
SUBWF
Syntax:
Operands:
Operation:
Status
Affected:
Description:
PIC16F630/676
[ label ] SUBWF f,d
0 ≤ f ≤ 127
(f) - (W) → (destination)
Subtract (2’s complement method)
Subtract W from f
d ∈ [0,1]
C, DC, Z
W register from register 'f'. If 'd' is 0,
the result is stored in the W
register. If 'd' is 1, the result is
stored back in register 'f'.
Subtract W from Literal
[ label ] SUBLW k
0 ≤ k ≤ 255
k - (W) → (W)
The W register is subtracted (2’s
complement method) from the
eight-bit literal 'k'. The result is
placed in the W register.
[ label ] SLEEP
None
00h → WDT,
0 → WDT prescaler,
1 → TO,
0 → PD
TO, PD
The power-down STATUS bit,
PD is cleared. Time-out STATUS
bit, TO is set. Watchdog Timer
and its prescaler are cleared.
The processor is put into SLEEP
mode with the oscillator stopped.
DS40039C-page 77