PIC16F627-04/P Microchip Technology Inc., PIC16F627-04/P Datasheet - Page 65
PIC16F627-04/P
Manufacturer Part Number
PIC16F627-04/P
Description
18 PIN, 1.75 KB FLASH, 224 RAM, 16 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F627-04P.pdf
(170 pages)
Specifications of PIC16F627-04/P
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
128 Bytes
Input Output
16
Interface
SCI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
1.75K Bytes
Ram Size
224 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F627-04/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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11.2.2
Timer1 must be running in Timer mode or Synchro-
nized Counter mode if the CCP module is using the
compare feature. In Asynchronous Counter mode, the
compare operation may not work.
11.2.3
When generate software interrupt is chosen, the CCP1
pin is not affected. Only a CCP interrupt is generated (if
enabled).
TABLE 11-3:
2003 Microchip Technology Inc.
0Bh/8Bh/
10Bh/
18Bh
0Ch
8Ch
87h
0Eh
0Fh
10h
15h
16h
17h
Legend:
Address
x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by Capture and Timer1.
INTCON
PIR1
PIE1
TRISB
TMR1L
TMR1H
T1CON
CCPR1L
CCPR1H
CCP1CON
TIMER1 MODE SELECTION
SOFTWARE INTERRUPT MODE
Name
REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, AND TIMER1
PORTB Data Direction Register
Holding register for the Least Significant Byte of the 16-bit TMR1 register
Holding register for the Most Significant Byte of the 16-bit TMR1register
Capture/Compare/PWM register1 (LSB)
Capture/Compare/PWM register1 (MSB)
Bit 7
EEIE
EEIF
GIE
—
—
Bit 6
CMIF
CMIF
PEIE
—
—
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu
CCP1X
Bit 5
RCIE
RCIF
T0IE
CCP1Y
Bit 4
INTE
TXIF
TXIE
Preliminary
CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000
Bit 3
RBIE
—
—
11.2.4
In this mode, an internal hardware trigger is generated
which may be used to initiate an action.
The special event trigger output of CCP1 resets the
TMR1 register pair. This allows the CCPR1 register to
effectively be a 16-bit programmable period register for
Timer1.
CCP1IE TMR2IE
CCP1IF
Bit 2
T0IF
SPECIAL EVENT TRIGGER
TMR2IF
Bit 1
INTF
TMR1IF 0000 -000 0000 -000
TMR1IE 0000 -000 0000 -000
PIC16F62X
Bit 0
RBIF
0000 000x 0000 000u
1111 1111 1111 1111
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
Value on
DS40300C-page 63
POR
Value on
RESETS
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