PIC16F716-I/SS Microchip Technology Inc., PIC16F716-I/SS Datasheet - Page 132

• Manufacturer Part Number: PIC16F716-I/SS
• Description: MCU, 8-Bit, 2KW Flash, 128 RAM, 13 I/O, SSOP-20
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F716-I/SS

• A/d Inputs: 4-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 13
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 20-pin SSOP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F716
E
ECCP. See Enhanced Capture/Compare/PWM
ECCPAS Register ............................................................... 57
Effects of Reset
Electrical Characteristics..................................................... 91
Enhanced Capture/Compare/PWM..................................... 47
Enhanced Capture/Compare/PWM (ECCP)
Errata .................................................................................... 4
External Power-on Reset Circuit ......................................... 64
F
Firmware Instructions.......................................................... 77
Fuses. See Configuration Bits
I
I/O Ports .............................................................................. 19
ID Locations .................................................................. 61, 76
In-Circuit Serial Programming (ICSP) ........................... 61, 76
Indirect Addressing ............................................................. 18
Instruction Format ............................................................... 77
Instruction Set ..................................................................... 77
DS41206B-page 130
PWM mode ................................................................. 55
Enhanced PWM Mode
Timer Resources......................................................... 47
FSR Register ...................................................... 8, 9, 18
INDF Register ............................................................... 9
ADDLW ....................................................................... 79
ADDWF ....................................................................... 79
ANDLW ....................................................................... 79
ANDWF ....................................................................... 79
BCF ............................................................................. 79
BSF ............................................................................. 79
BTFSC ........................................................................ 79
BTFSS ........................................................................ 80
CALL ........................................................................... 80
CLRF........................................................................... 80
CLRW ......................................................................... 80
CLRWDT..................................................................... 80
COMF ......................................................................... 80
DECF .......................................................................... 80
DECFSZ...................................................................... 81
GOTO ......................................................................... 81
INCF............................................................................ 81
INCFSZ ....................................................................... 81
IORLW ........................................................................ 81
IORWF ........................................................................ 81
MOVF.......................................................................... 82
MOVLW ...................................................................... 82
MOVWF ...................................................................... 82
NOP ............................................................................ 82
RETFIE ....................................................................... 83
RETLW ....................................................................... 83
RETURN ..................................................................... 83
RLF ............................................................................. 84
RRF............................................................................. 84
SLEEP ........................................................................ 84
SUBLW ....................................................................... 84
SUBWF ....................................................................... 85
SWAPF ....................................................................... 85
XORLW ....................................................................... 85
Auto-Restart........................................................ 58
Auto-shutdown .................................................... 56
Half-Bridge Application Examples....................... 59
Programmable Dead Band Delay ....................... 59
Shoot-through Current ........................................ 59
INT Interrupt (RB0/INT). See Interrupt Sources
INTCON Register............................................................ 9, 13
Internal Sampling Switch (R
Internet Address ............................................................... 127
Interrupt Sources .......................................................... 61, 72
Interrupts
Interrupts, Context Saving During....................................... 73
Interrupts, Enable Bits
Interrupts, Flag Bits
M
Master Clear (MCLR)
Memory Organization
Microchip Internet Web Site.............................................. 127
Migration from Base-Line to Mid-Range Devices ............. 126
MPLAB ASM30 Assembler, Linker, Librarian ..................... 88
MPLAB ICD 2 In-Circuit Debugger ..................................... 89
MPLAB ICE 2000 High-Performance Universal
MPLAB Integrated Development Environment Software.... 87
MPLAB PM3 Device Programmer ...................................... 89
MPLAB REAL ICE In-Circuit Emulator System .................. 89
MPLINK Object Linker/MPLIB Object Librarian .................. 88
O
OPCODE Field Descriptions............................................... 77
OPTION Register................................................................ 12
OPTION_REG Register................................................ 10, 12
Oscillator
Oscillator Configuration ................................................ 61, 63
Oscillator, WDT................................................................... 74
P
Packaging ......................................................................... 121
Paging, Program Memory............................................... 7, 17
PCON Register ............................................................. 16, 68
PICSTART Plus Development Programmer....................... 90
PIE1 Register................................................................ 10, 14
PIR1 Register ................................................................. 9, 15
Pointer, FSR ....................................................................... 18
POR. See Power-on Reset
PORTA
XORWF ...................................................................... 85
Summary Table .......................................................... 78
Interrupt-on-Change (RB) ........................................... 21
RB0/INT Pin, External................................................. 73
TMR0 Overflow........................................................... 73
ADC ............................................................................ 40
TMR1 .......................................................................... 30
Global Interrupt Enable (GIE Bit) ................................ 72
Interrupt-on-Change (RB) Enable (RBIE Bit).............. 73
CCP1 Flag (CCP1IF Bit)............................................. 15
Interrupt-on-Change (RB) Flag (RBIF Bit) .................. 73
TMR0 Overflow Flag (T0IF Bit)................................... 73
MCLR Reset, Normal Operation..................... 64, 69, 70
MCLR Reset, Sleep ........................................ 64, 69, 70
Data Memory ................................................................ 7
Program Memory .......................................................... 7
In-Circuit Emulator ...................................................... 89
Associated registers ................................................... 33
HS......................................................................... 63, 68
LP ......................................................................... 63, 68
RC .................................................................. 63, 64, 68
XT ......................................................................... 63, 68
PDIP Details ............................................................. 122
CCP1IF Bit.................................................................. 15
Associated Registers .................................................. 20
© 2007 Microchip Technology Inc.
SS
) I
MPEDANCE
........................ 43