PIC16F819-I/SO Microchip Technology Inc., PIC16F819-I/SO Datasheet
PIC16F819-I/SO
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PIC16F819-I/SO Summary of contents
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... Enhanced Flash Microcontrollers 2004 Microchip Technology Inc. PIC16F818/819 Data Sheet with nanoWatt Technology 18/20-Pin DS39598E ...
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... Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. , microID, MPLAB, PIC, PICmicro, PICSTART, ® 8-bit MCUs ® code hopping EE OQ 2004 Microchip Technology Inc. ...
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... Synchronous Serial Port (SSP) with 2 SPI™ (Master/Slave) and I C™ (Slave) Program Memory Device Flash # Single-Word (Bytes) Instructions PIC16F818 1792 1024 PIC16F819 3584 2048 2004 Microchip Technology Inc. PIC16F818/819 Pin Diagram 18-Pin PDIP, SOIC RA2/AN2/V - REF RA3/AN3/V + REF ...
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... RB6/T1OSO/T1CKI/PGC 8 RB2/SDO/CCP1 11 RB5/SS 9 RB3/CCP1/PGM 10 RB4/SCK/SCL 28-Pin QFN RA5/MCLR RB0/INT DS39598E-page 2 20-Pin SSOP RA2/AN2/V - REF RA3/AN3/V + REF RA4/AN4/T0CKI RA5/MCLR RB0/INT RB1/SDI/SDA RB2/SDO/CCP1 RB3/CCP1/PGM PIC16F818/819 RA1/AN1 2 RA0/AN0 RA7/OSC1/CLKI 4 17 RA6/OSC2/CLKO RB7/T1OSI/PGD 8 RB6/T1OSO/T1CKI/PGC 13 RB5/ RB4/SCK/SCL 11 RA7/OSC1/CLKI RA6/OSC2/CLKO RB7/T1OSI/PGD RB6/T1OSO/T1CKI/PGC 2004 Microchip Technology Inc. ...
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... When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are using. Customer Notification System Register on our web site at www.microchip.com to receive the most current information on all of our products. 2004 Microchip Technology Inc. PIC16F818/819 DS39598E-page 3 ...
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... PIC16F818/819 NOTES: DS39598E-page 4 2004 Microchip Technology Inc. ...
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... TABLE 1-1: Program Device ® Mid-Range PIC16F818 PIC16F819 There are 16 I/O pins that are user configurable on a pin-to-pin basis. Some pins are multiplexed with other device functions. These functions include: • External Interrupt • Change on PORTB Interrupt • Timer0 Clock Input • ...
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... Status reg 3 MUX Power-up Timer Oscillator ALU Power-on 8 Reset W reg Timer Reset Data EE Timer2 128/256 Bytes CCP1 PORTA RA0/AN0 RA1/AN1 RA2/AN2/V - REF RA3/AN3/V + REF RA4/AN4/T0CKI RA5/MCLR/V PP RA6/OSC2/CLKO RA7/OSC1/CLKI PORTB RB0/INT RB1/SDI/SDA RB2/SDO/CCP1 RB3/CCP1/PGM RB4/SCK/SCL RB5/SS RB6/T1OSO/T1CKI/PGC RB7/T1OSI/PGD 2004 Microchip Technology Inc. ...
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... This buffer is a Schmitt Trigger input when configured as the external interrupt. 2: This buffer is a Schmitt Trigger input when used in Serial Programming mode. 3: This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise. 2004 Microchip Technology Inc. QFN I/O/P Buffer Pin# ...
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... Interrupt-on-change pin Timer1 oscillator input. ( In-circuit debugger and ICSP programming data pin – Ground reference for logic and I/O pins. P – Positive supply for logic and I/O pins. = Output I/O = Input/Output ST = Schmitt Trigger Input Description Power 2004 Microchip Technology Inc. ...
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... For the PIC16F818, the first (0000h-03FFh) is Figure 2-1). For the PIC16F819, the first located at 0000h-07FFh (see Figure 2-2). Accessing a location above the physically implemented address will cause a wraparound. For example, the same instruc- tion will be accessed at locations 020h, 420h, 820h, C20h, 1020h, 1420h, 1820h and 1C20h ...
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... EEPROM data memory description can be 1 found in Section 3.0 “Data EEPROM and Flash Program Memory” of this data 2 sheet. 3 2.2.1 GENERAL PURPOSE REGISTER FILE The register file can be accessed either directly or indirectly through the File Select Register, FSR. 2004 Microchip Technology Inc. ...
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... General Purpose Register 96 Bytes 7Fh Bank 0 Unimplemented data memory locations, read as ‘0’. * Not a physical register. Note 1: These registers are reserved; maintain these registers clear. 2004 Microchip Technology Inc. File Address Indirect addr.(*) 80h TMR0 81h PCL PCL 82h ...
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... PIC16F818/819 FIGURE 2-4: PIC16F819 REGISTER FILE MAP File Address Indirect addr.(*) Indirect addr.(*) 00h TMR0 01h OPTION_REG 02h PCL 03h STATUS 04h FSR PORTA 05h 06h PORTB 07h 08h 09h 0Ah PCLATH 0Bh INTCON PIR1 0Ch 0Dh PIR2 0Eh TMR1L 0Fh ...
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... Pin input only; the state of the TRISA5 bit has no effect and will always read ‘1’. 2004 Microchip Technology Inc. The Special Function Registers can be classified into two sets: core (CPU) and peripheral. Those registers associated with the core functions are described in detail in this section ...
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... TUN0 36 --00 0000 — — 68 1111 1111 71, 76 0000 0000 0000 0000 — — — — — — — — — — — — — — — — — — 81 xxxx xxxx PCFG1 PCFG0 82 00-- 0000 2004 Microchip Technology Inc. ...
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... The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8>, whose contents are transferred to the upper byte of the program counter. 3: Pin input only; the state of the TRISA5 bit has no effect and will always read ‘1’. 2004 Microchip Technology Inc. Bit 5 Bit 4 Bit 3 ...
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... See the SUBLW and SUBWF instructions for examples. R/W-0 R-1 RP1 RP0 Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R-1 R/W-x R/W-x R/W bit 0 (1) (1, Bit is unknown 2004 Microchip Technology Inc. ...
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... Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. PIC16F818/819 Note: To achieve a 1:1 prescaler assignment for the TMR0 register, assign the prescaler to the Watchdog Timer. R/W-1 R/W-1 R/W-1 R/W-1 T0CS T0SE PSA PS2 ...
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... R/W-0 R/W-0 R/W-0 PEIE TMR0IE INTE RBIE W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R/W-0 R/W-0 R/W-x TMR0IF INTF RBIF bit Bit is unknown 2004 Microchip Technology Inc. ...
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... Disables the TMR2 to PR2 match interrupt bit 0 TMR1IE: TMR1 Overflow Interrupt Enable bit 1 = Enables the TMR1 overflow interrupt 0 = Disables the TMR1 overflow interrupt Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. PIC16F818/819 U-0 U-0 R/W-0 R/W-0 — — SSPIE ...
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... U-0 U-0 R/W-0 R/W-0 — — SSPIF CCP1IF W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared 2004 Microchip Technology Inc. R/W-0 R/W-0 TMR2IF TMR1IF bit Bit is unknown ...
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... Unimplemented: Read as ‘0’ bit 4 EEIF: EEPROM Write Operation Interrupt Enable bit 1 = Enable EE write interrupt 0 = Disable EE write interrupt bit 3-0 Unimplemented: Read as ‘0’ Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. U-0 U-0 R/W-0 U-0 — — EEIE — Writable bit U = Unimplemented bit, read as ‘ ...
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... BOREN bit in the Configuration word). U-0 U-0 U-0 U-0 — — — — Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared U-0 R/W-0 R/W-x — POR BOR bit Bit is unknown 2004 Microchip Technology Inc. ...
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... The stack is POPed in the event of a RETURN, RETLW or a RETFIE instruction execution. PCLATH is not affected by a PUSH or POP operation. 2004 Microchip Technology Inc. PIC16F818/819 The stack operates as a circular buffer. This means that after the stack has been PUSHed eight times, the ninth push overwrites the value that was stored from the first push ...
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... Data (1) Memory 7Fh Bank 0 Note 1: For register file map detail, see Figure 2-3 or Figure 2-4. DS39598E-page 24 0 IRP Bank Select 80h 100h 180h FFh 17Fh 1FFh Bank 1 Bank 2 Bank 3 Indirect Addressing 7 0 FSR Register Location Select 2004 Microchip Technology Inc. ...
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... These devices have words of program Flash, with an address range from 0000h to 03FFh for the PIC16F818 and 0000h to 07FFh for the PIC16F819. Addresses above the range of the respec- tive device will wraparound to the beginning of program memory. The EEPROM data memory allows single byte read and write ...
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... Value at POR DS39598E-page 26 U-0 U-0 R/W-x R/W-x — — FREE WRERR W = Writable bit S = Set only ‘1’ = Bit is set ‘0’ = Bit is cleared R/W-0 R/S-0 R/S-0 WREN WR RD bit Unimplemented bit, read as ‘0’ Bit is unknown 2004 Microchip Technology Inc. ...
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... EE Write Complete Interrupt Flag bit (EEIF) is set. The user can either enable this interrupt or poll this bit. EEIF must be cleared by software. 2004 Microchip Technology Inc. PIC16F818/819 The steps to write to EEPROM data memory are step 10 is not implemented, check the WR bit to see if a write is in progress ...
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... WREN bit to enable writes and set FREE bit to enable the erase. 3. Disable interrupts. 4. Write 55h to EECON2. 5. Write AAh to EECON2. 6. Set the WR bit. This will begin the row erase cycle. 7. The CPU will stall for duration of the erase. 2004 Microchip Technology Inc. ...
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... BSF EECON1, WR NOP NOP BCF EECON1, FREE BCF EECON1, WREN BSF INTCON, GIE 2004 Microchip Technology Inc. PIC16F818/819 ; Select Bank of EEADRH ; ; MS Byte of Program Address to Erase ; ; LS Byte of Program Address to Erase ; Select Bank of EECON1 ; Point to PROGRAM memory ; Enable Write to memory ; Enable Row Erase operation ...
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... After each long write, the 4 buffer registers will be reset to 3FFF EEDATH EEDATA 6 14 EEADR<1:0> Buffer Register Buffer Register Program Memory instruction, if EECON1, WR” instruction, if EECON1, WR” transfer the data from 0 All buffers are 8 transferred to Flash automatically after this word is written 14 14 EEADR<1:0> Buffer Register 2004 Microchip Technology Inc. ...
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... GOTO loop BANKSEL EECON1 BCF EECON1, WREN BSF INTCON, GIE 2004 Microchip Technology Inc. PIC16F818/819 ;prepare for WRITE procedure ;point to program memory ;allow write cycles ;perform write only ;prepare for 4 words to be written ;Start writing at 0x100 ;load HIGH address ...
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... Configuration Word (see Value on Value on Bit 0 Power-on all other Reset Resets xxxx xxxx uuuu uuuu xxxx xxxx uuuu uuuu --xx xxxx --uu uuuu ---- -xxx ---- -uuu RD x--x x000 x--x q000 ---- ---- ---- ---- — — ---0 ---- ---0 ---- — — ---0 ---- ---0 ---- 2004 Microchip Technology Inc. ...
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... A series resistor (R ) may be required for AT S strip cut crystals varies with the crystal chosen (typically F between 2004 Microchip Technology Inc. TABLE 4-1: Osc Type Capacitor values are for design guidance only. /4 OSC These capacitors were tested with the crystals listed below for basic start-up and operation ...
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... PORTA (RA6). Figure 4-3 shows the pin connections for the ECIO Oscillator mode. To Internal Logic FIGURE 4-3: Clock from Ext. System OSC2 for which the EXTERNAL CLOCK INPUT OPERATION (ECIO CONFIGURATION) OSC1/CLKI PIC16F818/819 I/O (OSC2) RA6 2004 Microchip Technology Inc. ...
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... RA6 Recommended values 100 k EXT C > EXT 2004 Microchip Technology Inc. PIC16F818/819 4.5 Internal Oscillator Block The PIC16F818/819 devices include an internal oscillator block which generates two different clock signals; either can be used as the system’s clock ) source. This can eliminate the need for external EXT oscillator circuits on the OSC1 and/or OSC2 pins ...
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... U-0 R/W-0 R/W-0 R/W-0 — TUN5 TUN4 TUN3 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R/W-0 R/W-0 R/W-0 TUN2 TUN1 TUN0 bit Bit is unknown 2004 Microchip Technology Inc. ...
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... IRCF bits using BCF or BSF instructions possible to modify the IRCF bits to a frequency that may be out of the V ification range; for example, V and IRCF = 111 (8 MHz). 2004 Microchip Technology Inc. PIC16F818/819 4.5.5 CLOCK TRANSITION SEQUENCE WHEN THE IRCF BITS ARE MODIFIED Following are three different sequences for switching the internal RC oscillator frequency ...
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... R/W-0 U-0 IRCF1 IRCF0 — Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared CONFIG (FOSC2:FOSC0) Peripherals Internal Oscillator CPU WDT R-0 U-0 U-0 IOFS — — bit Bit is unknown 2004 Microchip Technology Inc. ...
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... Shaded cells are not used by PORTA. Note 1: Pin input only; the state of the TRISA5 bit has no effect and will always read ‘1’. 2004 Microchip Technology Inc. Pin RA4 is multiplexed with the Timer0 module clock input and with an analog input to become the RA4/AN4/ T0CKI pin ...
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... TMR0 Clock Input To A/D Module Channel Input BLOCK DIAGRAM OF RA2/AN2/V - PIN REF I/O pin Analog Input Mode TTL Input Buffer RD TRISA Input REF BLOCK DIAGRAM OF RA4/AN4/T0CKI PIN I/O pin Analog Input Mode Schmitt Trigger Input Buffer RD TRISA 2004 Microchip Technology Inc. ...
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... OSC Data Bus PORTA CK Data Latch TRISA CK Q TRIS Latch RD TRISA Q RD PORTA Note 1: I/O pins have protection diodes CLKO signal is 1/4 of the F 2004 Microchip Technology Inc. PIN PP MCLR Filter SS Schmitt Trigger Input Buffer From OSC1 Oscillator Circuit 1x0,011) OSC ...
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... Q WR PORTA Q CK Data Latch TRISA CK Q TRIS Latch RD TRISA Q RD PORTA Note 1: I/O pins have protection diodes to V DS39598E-page 42 Oscillator Circuit (F = 011) OSC 10x OSC V SS Schmitt Trigger Input Buffer 10x EN OSC and RA7/OSC1/CLKI V SS 2004 Microchip Technology Inc. ...
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... Any read or write of PORTB. This will end the mismatch condition. b) Clear flag bit RBIF. 2004 Microchip Technology Inc. PIC16F818/819 A mismatch condition will continue to set flag bit RBIF. Reading PORTB will end the mismatch condition and allow flag bit RBIF to be cleared. ...
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... RB3 RB2 T0CS T0SE PSA PS2 2 C™ data I/O pin. Value on Value on Bit 1 Bit 0 all other POR, BOR Resets RB1 RB0 xxxx xxxx uuuu uuuu 1111 1111 1111 1111 PS1 PS0 1111 1111 1111 1111 2004 Microchip Technology Inc. ...
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... BLOCK DIAGRAM OF RB0 PIN (2) RBPU Data Bus WR PORTB WR TRISB RD PORTB To INT0 or CCP Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. 2004 Microchip Technology Inc. Data Latch TRIS Latch TRISB Q EN and V ...
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... Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. 3: The SDA Schmitt Trigger conforms to the I DS39598E-page TRISB Q Schmitt Trigger Buffer and specification Weak P Pull- (1) I/O pin TTL Input Buffer PORTB 2004 Microchip Technology Inc. ...
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... BLOCK DIAGRAM OF RB2 PIN CCPMX SDO CCP (2) RBPU Data Bus WR PORTB WR TRISB Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. 2004 Microchip Technology Inc. Module Select Data Latch TRIS Latch D Q ...
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... Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. DS39598E-page 48 CCP1<M3:M0> = 0100, 0101, 0110, 0111 and CCPMX = LVP = Weak P Pull-up (1) I/O pin TTL Input Buffer PORTB and 2004 Microchip Technology Inc. ...
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... Set RBIF From other RB7:RB4 pins SCK (3) SCL Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. 3: The SCL Schmitt Trigger conforms to the I 2004 Microchip Technology Inc. PIC16F818/819 Weak P Pull-up ...
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... From other RB7:RB4 pins SS Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. DS39598E-page Latch Q Q and Weak P Pull-up (1) I/O pin TTL Input Buffer PORTB EN Q3 2004 Microchip Technology Inc. ...
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... Program Mode RD PORTB Set RBIF From other RB7:RB4 pins T1CKI/PGC From T1OSO Output Note 1: I/O pins have diode protection enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. 2004 Microchip Technology Inc. Data Latch TRIS Latch ...
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... To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit. DS39598E-page Data Latch TRIS Latch TRISB T1OSCEN Analog Input Mode Input Buffer Latch Q RD PORTB Q and Weak P Pull-up (1) I/O pin TTL PORTB EN Q3 2004 Microchip Technology Inc. ...
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... PSA WDT Enable bit Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION_REG<5:0>). 2004 Microchip Technology Inc. Counter mode is selected by setting bit T0CS (OPTION_REG<5>). In Counter mode, Timer0 will increment either on every rising or falling edge of pin RA4/AN4/T0CKI. The incrementing edge is determined by the Timer0 Source Edge Select bit, T0SE (OPTION_REG< ...
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... T0SE PSA 128 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared ® Mid-Range MCU Family Reference Manual” (DS33023) must be R/W-1 R/W-1 R/W-1 PS2 PS1 PS0 bit Bit is unknown 2004 Microchip Technology Inc. ...
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... Timer0 Module Register 0Bh,8Bh, INTCON GIE PEIE 10Bh,18Bh 81h,181h OPTION_REG RBPU INTEDG Legend unknown unchanged unimplemented locations read as ‘0’. Shaded cells are not used by Timer0. 2004 Microchip Technology Inc. PIC16F818/819 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 TMR0IE INTE RBIE TMR0IF INTF T0CS ...
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... PIC16F818/819 NOTES: DS39598E-page 56 2004 Microchip Technology Inc. ...
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... Enables Timer1 0 = Stops Timer1 Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. The operating mode is determined by the clock select bit, TMR1CS (T1CON<1>). In Timer mode, Timer1 increments every instruction cycle. In Counter mode, it increments on every rising edge of the external clock input. ...
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... The prescaler, however, will continue to increment. TMR1 TMR1L TMR1ON T1SYNC On/Off 1 Prescaler T1OSCEN F /4 OSC Enable Internal 0 (1) Oscillator Clock T1CKPS1:T1CKPS0 TMR1CS Synchronized 0 Clock Input 1 Synchronize det 2 Q Clock 2004 Microchip Technology Inc. ...
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... TMR1L Read low byte MOVWF TMPL ; Re-enable the Interrupt (if required) CONTINUE ; Continue with your code 2004 Microchip Technology Inc. PIC16F818/819 7.5.1 READING AND WRITING TIMER1 IN ASYNCHRONOUS COUNTER MODE Reading TMR1H or TMR1L while the timer is running from an external asynchronous clock will ensure a valid read (taken care of in hardware) ...
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... If a high-speed circuit must be located near the oscilla- tor, a grounded guard ring around the oscillator circuit, as shown in Figure 7-4, may be helpful when used on a single-sided PCB or in addition to a ground plane. FIGURE 7-4: OSCILLATOR CIRCUIT WITH GROUNDED GUARD RING 2004 Microchip Technology Inc values of external or V ...
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... Brown-out Reset, which shuts off the timer and leaves a 1:1 prescale. In all other Resets, the register is unaffected. 7.10 Timer1 Prescaler The prescaler counter is cleared on writes to the TMR1H or TMR1L registers. 2004 Microchip Technology Inc. PIC16F818/819 7.11 Using Timer1 as a Real-Time Clock Adding an external LP oscillator to Timer1 (such as the signal one described in Section 7.6 “ ...
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... CCP1IF TMR2IF — — SSPIE CCP1IE TMR2IE Value on Value on Bit 1 Bit 0 all other POR, BOR Resets INTF RBIF 0000 000x 0000 000u TMR1IF -0-- 0000 -0-- 0000 TMR1IE -0-- 0000 -0-- 0000 xxxx xxxx uuuu uuuu xxxx xxxx uuuu uuuu 2004 Microchip Technology Inc. ...
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... Additional information on timer modules is available in ® the “PICmicro Mid-Range MCU Family Reference Manual” (DS33023). 2004 Microchip Technology Inc. 8.1 Timer2 Prescaler and Postscaler The prescaler and postscaler counters are cleared when any of the following occurs: • A write to the TMR2 register • ...
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... R/W-0 R/W-0 bit Bit is unknown Value on Value on Bit 1 Bit 0 all other POR, BOR Resets INTF RBIF 0000 000x 0000 000u TMR2IF TMR1IF -0-- 0000 -0-- 0000 TMR2IE TMR1IE -0-- 0000 -0-- 0000 0000 0000 0000 0000 1111 1111 1111 1111 2004 Microchip Technology Inc. ...
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... CCP1 resets TMR1 and starts an A/D conversion (if A/D module is enabled) 11xx = PWM mode Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. The CCP module’s input/output pin (CCP1) can be configured as RB2 or RB3. This selection is set in bit 12 (CCPMX) of the Configuration Word register. Additional information on the CCP module is available in the “ ...
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... CLRF CCP1CON MOVLW NEW_CAPT_PS ;Load the W reg with MOVWF CCP1CON CCPR1L TMR1L Example 9-1 shows the CHANGING BETWEEN CAPTURE PRESCALERS ;Turn CCP module off ;the new prescaler ;move value and CCP ON ;Load CCP1CON with this ;value 2004 Microchip Technology Inc. ...
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... CCP1CON — — Legend unknown unchanged unimplemented, read as ‘0’. Shaded cells are not used by Capture and Timer1. 2004 Microchip Technology Inc. 9.2.1 CCP PIN CONFIGURATION The user must configure the CCP1 pin as an output by clearing the TRISB<x> bit. Note 1: Clearing the CCP1CON register will force the CCP1 compare output latch to the default low level ...
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... PWM operation. When the CCPR1H and 2-bit latch match TMR2, concatenated with an internal 2-bit Q clock or 2 bits of the TMR2 prescaler, the CCP1 pin is cleared. • OSC (TMR2 Prescale Value) T • (TMR2 Prescale Value) OSC 2004 Microchip Technology Inc. ...
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... CCP1CON — — Legend unknown unchanged unimplemented, read as ‘0’. Shaded cells are not used by PWM and Timer2. 2004 Microchip Technology Inc. 9.3.3 SETUP FOR PWM OPERATION The following steps should be taken when configuring the CCP module for PWM operation: 1 ...
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... PIC16F818/819 NOTES: DS39598E-page 70 2004 Microchip Technology Inc. ...
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... Family Reference (DS33023). Refer to Application Note AN578, “Use of the SSP 2 Module in the I C™ Multi-Master Environment” (DS00578). 2004 Microchip Technology Inc. PIC16F818/819 10.2 SPI Mode This section contains operational characteristics of the SPI module. SPI mode allows 8 bits of data to be synchronously ...
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... R-0 R-0 CKE D mode only) C mode only mode only mode only mode only modes Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R-0 R-0 R bit Bit is unknown 2004 Microchip Technology Inc. ...
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... C Slave mode, 7-bit address with Start and Stop bit interrupts enabled 2 1111 = I C Slave mode, 10-bit address with Start and Stop bit interrupts enabled 1000, 1001, 1010, 1100, 1101 = Reserved Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. PIC16F818/819 R/W-0 R/W-0 R/W-0 SSPEN CKP SSPM3 ...
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... Value on Value on Bit 1 Bit 0 all other POR, BOR Resets INTF RBIF 0000 000x 0000 000u 1111 1111 1111 1111 xxxx xxxx uuuu uuuu SSPM0 0000 0000 0000 0000 UA BF 0000 0000 0000 0000 2004 Microchip Technology Inc. ...
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... SSPIF FIGURE 10-4: SPI™ MODE TIMING (SLAVE MODE WITH CKE = 1) SS SCK (CKP = 0) SCK (CKP = 1) SDO bit 7 bit 6 SDI (SMP = 0) bit 7 SSPIF 2004 Microchip Technology Inc. PIC16F818/819 bit 6 bit 5 bit 3 bit 4 bit 6 bit 5 bit 3 bit 4 bit 2 bit 5 bit 4 ...
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... Set, Reset Reference Manual” (DS33023 Bits (SSPSTAT Reg operation Slave mode pins (PORTx [SDA, SCL communication pins communica opera modes to be selected mode, with the SSPEN bit set module operation may be ® Mid-Range MCU Family 2004 Microchip Technology Inc. ...
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... For a 10-bit address, the first byte would equal ‘1111 0’, where A9 and A8 are the two MSbs of the address. 2004 Microchip Technology Inc. PIC16F818/819 The sequence of events for 10-bit address is as follows, with steps 7-9 for slave-transmitter: 1 ...
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... SSPBUF must be written to before the CKP bit can be set) Set bit SSPIF (SSP interrupt occurs if enabled) Yes Yes Yes Yes Receiving Data ACK Bus master terminates transfer ACK is not sent Transmitting Data ACK From SSP Interrupt Service Routine 2004 Microchip Technology Inc. ...
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... Shaded cells are not used by SSP module in SPI™ mode. 2 Note 1: Maintain these bits clear mode. 2004 Microchip Technology Inc. 10.3.3 MULTI-MASTER MODE OPERATION In Multi-Master mode operation, the interrupt genera- tion on the detection of the Start and Stop conditions allows the determination of when the bus is free. The Stop (P) and Start (S) bits are cleared from a Reset or when the SSP module is disabled ...
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... PIC16F818/819 NOTES: DS39598E-page 80 2004 Microchip Technology Inc. ...
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... A/D converter module is operating 0 = A/D converter module is shut-off and consumes no operating current Legend Readable bit -n = Value at POR 2003 Microchip Technology Inc. PIC16F818/819 The A/D module has four registers: • A/D Result High Register (ADRESH) • A/D Result Low Register (ADRESL) • ...
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... Bit is cleared R/W-0 R/W-0 R/W-0 PCFG2 PCFG1 PCFG0 bit C/R REF REF AN3 AN3 AN3 AN3 AN2 3 5 AN3 AV 4/1 SS AN3 AN2 3/2 AN3 AN2 3/2 AN3 AN2 2 1 AN3 AN2 1 Bit is unknown 2003 Microchip Technology Inc. ...
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... V REF (Reference Voltage) V REF (Reference Voltage) 2003 Microchip Technology Inc. These steps should be followed for doing an A/D conversion: 1. Configure the A/D module: • Configure analog pins/voltage reference and digital I/O (ADCON1) • Select A/D input channel (ADCON0) • Select A/D conversion clock (ADCON0) • ...
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... HOLD delay must complete before acquisition can begin again Sampling Switch LEAKAGE V = 0.6V T ± 500 the minimum acquisition time, , see ACQ Mid-Range MCU Family Reference SS C HOLD = DAC Capacitance = 120 Sampling Switch (k ) 2003 Microchip Technology Inc. ...
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... When the device frequencies are greater than 1 MHz, the RC A/D conversion clock source is only recommended for Sleep operation. 3: For extended voltage devices (LF), please refer to Section 15.0 “Electrical Characteristics”. 2003 Microchip Technology Inc. 11.3 Configuring Analog Port Pins The ADCON1 and TRISA registers control the opera- tion of the A/D port pins ...
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... AD CYCLES ADRES is loaded, GO bit is cleared, ADIF bit is set, Holding Capacitor is connected to analog input 10-bit Result 0 7 ADRESH 10-bit Result ADFM = 0000 00 ADRESL Left Justified 2003 Microchip Technology Inc. ...
Page 89
... TRISA TRISA7 TRISA6 TRISA5 PORTA Data Direction Register Legend unknown unchanged unimplemented, read as ‘0’. Shaded cells are not used for A/D conversion. 2003 Microchip Technology Inc. 11.6 Effects of a Reset A device Reset forces all registers to their Reset state. The A/D module is disabled and any conversion in progress is aborted ...
Page 90
... PIC16F818/819 NOTES: DS39598D-page 88 2003 Microchip Technology Inc. ...
Page 91
... With these two timers on-chip, most applications need no external Reset circuitry. 2004 Microchip Technology Inc. PIC16F818/819 Sleep mode is designed to offer a very low-current power-down mode. The user can wake-up from Sleep through external Reset, Watchdog Timer wake-up or through an interrupt ...
Page 92
... For PIC16F818 Write protection off 10 = 000h to 01FF write-protected, 0200 to 03FF may be modified by EECON control 01 = 000h to 03FF write-protected For PIC16F819 Write protection off 10 = 0000h to 01FFh write-protected, 0200h to 07FFh may be modified by EECON control 01 = 0000h to 03FFh write-protected, 0400h to 07FFh may be modified by EECON control 00 = 0000h to 05FFh write-protected, 0600h to 07FFh may be modified by EECON control ...
Page 93
... OSC1 PWRT INTRC 10-bit Ripple Counter 31.25 kHz 2004 Microchip Technology Inc. PIC16F818/819 Some registers are not affected in any Reset condition. Their status is unknown on POR and unchanged in any other Reset. Most other registers are reset to a “Reset state” on Power-on Reset (POR), on the MCLR and WDT Reset, on MCLR Reset during Sleep and Brown- out Reset (BOR) ...
Page 94
... PCON and PC registers, while Table 12-4 shows the Reset conditions for all the registers. falls below V DD BOR BOR falls below V for less DD BOR rises above V . The DD BOR DD during T , the Brown-out PWRT rises above V DD BOR configuration bits are 2004 Microchip Technology Inc. ...
Page 95
... Note 1: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 2004 Microchip Technology Inc. bit BOR cleared, indicating a Brown-out Reset occurred. When the Brown-out Reset is disabled, the state of the BOR bit is unpredictable. ...
Page 96
... Microchip Technology Inc. ...
Page 97
... DD MCLR Internal POR PWRT Time-out OST Time-out Internal Reset FIGURE 12-5: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED NETWORK): CASE MCLR Internal POR PWRT Time-out OST Time-out Internal Reset 2004 Microchip Technology Inc. PIC16F818/819 T PWRT T OST T PWRT T OST T PWRT T OST THROUGH DD THROUGH ...
Page 98
... Q cycle. The latency is the same for one or two-cycle instructions. Individual interrupt flag bits are set regardless of the status of their corresponding mask bit, PEIE bit or the GIE bit. TMR0IF TMR0IE INTF INTE RBIF RBIE PEIE GIE Wake-up (if in Sleep mode) Interrupt to CPU 2004 Microchip Technology Inc. ...
Page 99
... For PIC16F818 devices, the upper 64 bytes of each bank are common. Temporary holding registers, W_TEMP and STATUS_TEMP, should be placed here. These 64 locations do not require banking and therefore, make it easier for context save and restore. For PIC16F819 devices, the upper 16 bytes of each enable bit, bank are common. DS39598E-page 97 ...
Page 100
... Postscaler 8-to-1 MUX PSA To TMR0 (Figure 6- MUX PSA WDT Time-out Bit 6 Bit 5 Bit 4 Bit 3 INTEDG T0CS T0SE PSA BOREN MCLRE FOSC2 PWRTEN PS2:PS0 Bit 2 Bit 1 Bit 0 PS2 PS1 PS0 WDTEN FOSC1 FOSC0 2004 Microchip Technology Inc. ...
Page 101
... A/D conversion (when A/D clock source is RC). 7. EEPROM write operation completion. 2004 Microchip Technology Inc. Other peripherals cannot generate interrupts since during Sleep, no on-chip clocks are present. When the SLEEP instruction is being executed, the next instruction ( prefetched. For the device to wake-up through an interrupt event, the corresponding interrupt enable bit must be set (enabled) ...
Page 102
... It is recommended that only the four Least Significant bits of the ID location are used GND (Note 0004h 0005h Inst(0004h) Inst(0005h) Dummy Cycle Inst(0004h) protection bit(s) have not been 2004 Microchip Technology Inc. ...
Page 103
... If ICSP or ICD operations are required, the crystal should be disconnected from the circuit (disconnect either lead) or installed after programming. The oscillator loading capacitors may remain in-circuit during ICSP or ICD operation. 2004 Microchip Technology Inc. PIC16F818/819 FIGURE 12-10: TYPICAL IN-CIRCUIT SERIAL PROGRAMMING CONNECTION ...
Page 104
... Programming mode. 5: LVP mode is enabled by default on all devices shipped from Microchip. It can be disabled by clearing the LVP bit in the Configuration Word register. 6: Disabling LVP will provide maximum compatibility devices. to the IHH Low-Voltage ICSP mode to other PIC16CXXX 2004 Microchip Technology Inc. ...
Page 105
... A read operation is performed on a register even if the instruction writes to that register. 2004 Microchip Technology Inc. PIC16F818/819 For example, a “CLRF PORTB” instruction will read PORTB, clear all the data bits, then write the result back to PORTB ...
Page 106
... PD TO 0000 0110 0100 , 1kkk kkkk kkkk Z 1000 kkkk kkkk 00xx kkkk kkkk 0000 0000 1001 01xx kkkk kkkk 0000 0000 1000 TO PD 0000 0110 0011 , C, DC, Z 110x kkkk kkkk Z 1010 kkkk kkkk ® Mid-Range MCU 2004 Microchip Technology Inc. ...
Page 107
... Operation: (W) .AND. (k) (W) Status Affected: Z Description: The contents of W register are ANDed with the eight-bit literal ‘k’. The result is placed in the W register. 2004 Microchip Technology Inc. ANDWF k Syntax: Operands: Operation: Status Affected: Description: BCF Syntax: f,d Operands: Operation: ...
Page 108
... None 00h ( register is cleared. Zero bit (Z) is set. Clear Watchdog Timer [ label ] CLRWDT None 00h WDT 0 WDT prescaler TO, PD CLRWDT instruction resets the Watchdog Timer. It also resets the prescaler of the WDT. Status bits TO and PD are set. 2004 Microchip Technology Inc. ...
Page 109
... W register. If ‘d’ the result is placed back in register ‘f’. If the result is ‘1’, the next instruction is executed. If the result is ‘0’, then a NOP is executed instead, making instruction. CY 2004 Microchip Technology Inc. PIC16F818/819 GOTO Unconditional Branch Syntax: [ label ] GOTO k Operands ...
Page 110
... The eight-bit literal ‘k’ is loaded into W register. The don’t cares will assemble as ‘0’s. Move label ] MOVWF 127 (W) (f) None Move data from W register to register ‘f’. No Operation [ label ] NOP None No operation None No operation. 2004 Microchip Technology Inc. ...
Page 111
... Status Affected: None Description: Return from subroutine. The stack is POPed and the top of the stack (TOS) is loaded into the program counter. This is a two-cycle instruction. 2004 Microchip Technology Inc. PIC16F818/819 RLF Rotate Left f through Carry Syntax: [ label ] RLF f,d Operands: ...
Page 112
... XORWF Operands 127 d [0,1] Operation: (W) .XOR. (f) destination) Status Affected: Z Description: Exclusive OR the contents of the W register with register ‘f’. If ‘d’ the result is stored in the W register. If ‘d’ the result is stored back in register ‘f’. 2004 Microchip Technology Inc. f,d ...
Page 113
... Developer Kits - CAN ® - PowerSmart Developer Kits - Analog 2003 Microchip Technology Inc. PIC16F818/819 14.1 MPLAB Integrated Development Environment Software The MPLAB IDE software brings an ease of software development previously unseen in the 8/16-bit micro- controller market. The MPLAB IDE is a Windows based application that contains: • ...
Page 114
... MPLAB C30 C Compiler and MPLAB ASM30 assembler. The simulator runs in either a Command Line mode for automated tasks, or from MPLAB IDE. This high-speed simulator is designed to debug, analyze and optimize time intensive DSP routines. 2003 Microchip Technology Inc. software ...
Page 115
... The PC platform and Microsoft Windows 32-bit operating system were chosen to best make these features available in a simple, unified application. 2003 Microchip Technology Inc. PIC16F818/819 14.11 MPLAB ICD 2 In-Circuit Debugger Microchip’s In-Circuit Debugger, MPLAB ICD powerful, ...
Page 116
... H-Bridge motor driver, LIN transceiver and EEPROM. Also included are: header for expansion, eight LEDs, four potentiometers, three push buttons and a proto- typing area. Included with the kit is a PIC16F627A and a PIC18F1320. Tutorial firmware is included along with the User’s Guide. 2003 Microchip Technology Inc. ...
Page 117
... Tricks for 8-pin Flash PIC Microcontrollers” Handbook and a USB interface cable. Supports all current 8/14-pin Flash PIC microcontrollers, as well as many future planned devices. 2003 Microchip Technology Inc. 14.24 PICDEM USB PIC16C7X5 Demonstration Board The PICDEM USB Demonstration Board shows off the capabilities of the PIC16C745 and PIC16C765 USB microcontrollers ...
Page 118
... PIC16F818/819 NOTES: DS39598D-page 116 2003 Microchip Technology Inc. ...
Page 119
... This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. 2004 Microchip Technology Inc. (except V and MCLR) ................................................... -0. (Note 2) ...
Page 120
... F = (12 MHz/V) (V MAX Note the minimum voltage of the PICmicro DDAPPMIN Note 2: F has a maximum frequency of 10 MHz. MAX DS39598E-page 118 16 MHz Frequency 4 MHz 10 MHz Frequency – 2.5V MHz DDAPPMIN ® 20 MHz device in the application. 2004 Microchip Technology Inc. ...
Page 121
... This is the limit to which V can be lowered in Sleep mode, or during a device Reset, without losing RAM data DD 2: When BOR is enabled, the device will operate correctly until the V 2004 Microchip Technology Inc. PIC16F818/819 Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C ...
Page 122
... V DD 1.7 A +85°C 1.0 A -40°C 1.0 A +25° 5.0 A +85° +125°C is not included. The current through the resistor can be estimated EXT (mA) with EXT Conditions = 2.0V = 3. and all features that add delta 2004 Microchip Technology Inc. ...
Page 123
... OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to V MCLR = V ; WDT enabled/disabled as specified For RC oscillator configurations, current through R by the formula /2R DD EXT 2004 Microchip Technology Inc. -40°C T +85°C for industrial A -40°C T +85°C for industrial A -40°C T +125° ...
Page 124
... V DD 1050 A +85°C 1.5 mA +125°C is not included. The current through the resistor can be estimated EXT (mA) with EXT Conditions = 2. OSC Z (3) (RC Oscillator) = 5.0V = 2. MHz OSC (3) (RC Oscillator and all features that add delta 2004 Microchip Technology Inc. ...
Page 125
... OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to V MCLR = V ; WDT enabled/disabled as specified For RC oscillator configurations, current through R by the formula /2R DD EXT 2004 Microchip Technology Inc. -40°C T +85°C for industrial A -40°C T +85°C for industrial A -40°C T +125° ...
Page 126
... The current through the resistor can be estimated EXT (mA) with EXT Conditions = 2. 31.25 kHz OSC = 3.0V (RC_RUN mode, Internal RC Oscillator) = 5. MHz OSC = 3.0V (RC_RUN mode, Internal RC Oscillator) = 5. MHz OSC = 3.0V (RC_RUN mode, Internal RC Oscillator and all features that add delta 2004 Microchip Technology Inc. ...
Page 127
... OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to V MCLR = V ; WDT enabled/disabled as specified For RC oscillator configurations, current through R by the formula /2R DD EXT 2004 Microchip Technology Inc. -40°C T +85°C for industrial A -40°C T +85°C for industrial A -40°C T +125° ...
Page 128
... C to +125 C is not included. The current through the resistor can be estimated EXT (mA) with EXT Conditions = 2.0V = 3.0V = 5.0V = 5.0V = 2.0V = 3.0V 32 kHz on Timer1 = 5.0V = 2.0V = 3.0V A/D on, Sleep, not converting = 5. and all features that add delta 2004 Microchip Technology Inc. ...
Page 129
... Example part number for the specifications listed above: PIC16F818-I/SS (PIC16F818 device, Industrial temperature, SSOP package). 5: Example part number for the specifications listed above: PIC16F818-I/SSTSL (PIC16F818 device, Industrial temperature, SSOP package). 2004 Microchip Technology Inc. -40°C T +85°C for industrial A -40°C T +85° ...
Page 130
... V 5. (Note For entire V range 4. For entire V range DD V For entire V range (Note 1) V For entire V range 5V PIN SS A Vss pin at PIN DD high-impedance A Vss V V PIN DD A Vss XT, HS PIN DD and LP oscillator configuration 2004 Microchip Technology Inc. ...
Page 131
... The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. Higher leakage current may be measured at different input voltages. 3: Negative current is defined as current sourced by the pin. 2004 Microchip Technology Inc. PIC16F818/819 (Industrial, Extended) PIC16LF818/819 (Industrial) (Continued) Standard Operating Conditions (unless otherwise stated) ...
Page 132
... OSC2, but including PORTD and PORTE outputs as ports for OSC2 output DS39598E-page 130 specifications only specifications only) T Time osc OSC1 SCK T0CKI t1 T1CKI Period R Rise V Valid Z High-impedance High High Low Low SU Setup STO Stop condition Load Condition Pin 2004 Microchip Technology Inc. ...
Page 133
... All devices are tested to operate at “min.” values with an external clock applied to the OSC1/CLKI pin. When an external clock input is used, the “max.” cycle time limit is “DC” (no clock) for all devices. 2004 Microchip Technology Inc ...
Page 134
... (Note 1) CY — — ns (Note 1) — — ns (Note 1) 100 255 ns — — ns — — ns — — — 145 — 145 ns — — ns — — ns 2004 Microchip Technology Inc. ...
Page 135
... Brown-out Reset Pulse Width BOR * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. 2004 Microchip Technology Inc. PIC16F818/819 BOR ...
Page 136
... PIC16LF818/819 Greater of PIC16F818/819 60 — PIC16LF818/819 100 — DC — 32.768 kHz 2 T — OSC 2004 Microchip Technology Inc. 48 Max Units Conditions — ns Must also meet parameter 42 — ns — ns Must also meet parameter 42 — ns — ns — prescale value (2, 4, ..., 256) — ...
Page 137
... T F CCP1 Output Fall Time CC * These parameters are characterized but not tested. † Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. 2004 Microchip Technology Inc. PIC16F818/819 Min Typ† ...
Page 138
... SPI™ MASTER MODE TIMING (CKE = 1, SMP = SCK (CKP = SCK (CKP = 1) SDO MSb SDI MSb In 74 Note: Refer to Figure 15-3 for load conditions. DS39598E-page 136 MSb Bit 75, 76 Bit LSb Bit 75, 76 Bit LSb LSb LSb 2004 Microchip Technology Inc. ...
Page 139
... FIGURE 15-13: SPI™ SLAVE MODE TIMING (CKE = SCK (CKP = 0) 71 SCK (CKP = 1) MSb SDO SDI SDI MSb In 74 Note: Refer to Figure 15-3 for load conditions. 2004 Microchip Technology Inc Bit MSb 75, 76 MSb In Bit Bit LSb 75, 76 Bit LSb In ...
Page 140
... PIC16LF818/819 — — PIC16F818/819 — PIC16LF818/819 — T Edge — 1 Typ† Max Units Conditions — — — — — — ns — — ns — — — — — 145 ns — — — — — Stop Condition 2004 Microchip Technology Inc. ...
Page 141
... C™ BUS DATA TIMING 103 SCL 90 91 SDA In 109 SDA Out Note: Refer to Figure 15-3 for load conditions. 2004 Microchip Technology Inc. Min Typ Max 100 kHz mode 4700 — — 400 kHz mode 600 — — 100 kHz mode 4000 — ...
Page 142
... Only relevant for Repeated Start condition s s After this period, the first clock pulse is generated (Note (Note Time the bus must be free before a new transmission s can start bus system but : = 1000 + 250 = 1250 ns SU DAT 2004 Microchip Technology Inc. ...
Page 143
... RA3 pin or V REF 3: The A/D conversion result never decreases with an increase in the input voltage and has no missing codes. 4: Maximum allowed impedance for analog voltage source 2004 Microchip Technology Inc. PIC16F818/819 PIC16LF818/819 (INDUSTRIAL) Min Typ† Max — ...
Page 144
... LSb (i.e., 5 5.12V) from the last sampled voltage (as stated HOLD — — If the A/D clock source is selected as RC, a time added before the A/D clock starts. This allows the SLEEP instruction to be executed. 2004 Microchip Technology Inc. is ...
Page 145
... FIGURE 16-2: MAXIMUM Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to +125°C) 7 Minimum: mean – 3 (-40°C to +125° 2004 Microchip Technology Inc. vs. F OVER V (HS MODE) OSC (MHz) OSC vs. F OVER V (HS MODE) OSC (MHz) OSC PIC16F818/819 5.5V 5 ...
Page 146
... F (MHz) OSC vs. F OVER V (XT MODE) OSC DD 1500 2000 2500 F (MHz) OSC 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 2.0V 3000 3500 4000 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 2.0V 3000 3500 4000 2004 Microchip Technology Inc. ...
Page 147
... FIGURE 16-6: MAXIMUM I DD 120 Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to +125°C) Minimum: mean – 3 (-40°C to +125°C) 100 2004 Microchip Technology Inc. vs. F OVER V (LP MODE) OSC (kHz) OSC vs. F OVER V (LP MODE) OSC DD 50 ...
Page 148
... F (MHz) OSC vs - +125 C, 1 MHz TO 8 MHz DD 3.0 4.0 5.0 F (MHz) OSC 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 2.0V 6.0 7.0 8.0 5.5V 5.0V 4.5V 4.0V 3.5V 3.0V 2.5V 2.0V 6.0 7.0 8.0 2004 Microchip Technology Inc. ...
Page 149
... Operation above 4 MHz is not recommended 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 2.0 2.5 3.0 2004 Microchip Technology Inc. Max (125°C) Max (85°C) Typ (25°C) Typical: Maximum: mean + 3 (-40°C to +125°C) Minimum: 3.0 3.5 4 ...
Page 150
... V FOR VARIOUS VALUES 3.0 3.5 4.0 V (V) DD vs. V FOR VARIOUS VALUES 3.3 kOhm 5.1 kOhm 10 kOhm 100 kOhm 3.0 3.5 4.0 V (V) DD 3.3 kOhm 5.1 kOhm 10 kOhm 100 kOhm 4.5 5.0 5.5 4.5 5.0 5.5 2004 Microchip Technology Inc. ...
Page 151
... Maximum: mean + 3 (-40°C to +125°C) 16 Minimum: mean – 3 (-40°C to +125° 2.0 2.5 2004 Microchip Technology Inc. Typ (+25°C) Typical: Maximum: mean + 3 (-40°C to +125°C) Minimum: 3.0 3.5 4.0 V (V) DD Max (-40°C to +125°C) Max (-40°C to +85°C) Typ (25° ...
Page 152
... TO +125°C (SLEEP MODE, DD Indeterminant State 3.0 3.5 4.0 V (V) DD Max (-40°C to +125°C) Max (-40°C to +85°C) Typ (+25°C) 3.5 4.0 V (V) DD Device in Sleep Max (125°C) Typ (25°C) 4.5 5.0 5.5 4.5 5.0 5.5 2004 Microchip Technology Inc. ...
Page 153
... Minimum: mean – 3 (-40°C to +125°C) 1.0 0.5 0 FIGURE 16-18: TYPICAL, MINIMUM AND MAXIMUM V 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 2004 Microchip Technology Inc. PIC16F818/819 vs (-mA Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to +125°C) Minimum: mean – 3 (-40°C to +125°C) Max Typ (25° ...
Page 154
... Minimum: mean – 3 (-40°C to +125°C) 2.0 1.5 1.0 0.5 0 DS39598E-page 152 vs 5V, - +125 Typ (25°C) Min (-40° (-mA 3V, - +125 Typ (25°C) Min (-40° (-mA) OL 2004 Microchip Technology Inc. Max (125°C) Max (85° Max (125°C) Max (85° ...
Page 155
... Typical: statistical mean @ 25°C Maximum: mean + 3 (-40°C to +125°C) 3.5 Minimum: mean – 3 (-40°C to +125°C) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 2.0 2.5 3.0 2004 Microchip Technology Inc. vs. V (TTL INPUT, - +125 Max (-40° Typ (25° Min (125° ...
Page 156
... DS39598E-page 154 2 vs C™ INPUT, - +125 3.5 4 +125 C) REFH DD REFH 3 3 and V (V) DD REFH V Max IH V Min IH 4.5 5.0 5.5 +125°C 125C 4.5 5 5.5 2004 Microchip Technology Inc. ...
Page 157
... FIGURE 16-25: A/D NONLINEARITY vs 2.5 2 1 2.5 2004 Microchip Technology Inc. PIC16F818/819 (V = 5V, - +125 C) REFH DD Max (-40°C to +125°C) Max (-40C to 125C) Typ (+25°C) Typ (25C (V) REFH 4.5 5 5.5 DS39598E-page 155 ...
Page 158
... PIC16F818/819 NOTES: DS39598E-page 156 2004 Microchip Technology Inc. ...
Page 159
... Standard PICmicro device marking consists of Microchip part number, year code, week code and traceability code. For PICmicro device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 2004 Microchip Technology Inc. PIC16F818/819 Example PIC16F818-I/P ...
Page 160
... L p MILLIMETERS MIN NOM MAX 18 2.54 3.56 3.94 4.32 2.92 3.30 3.68 0.38 7.62 7.94 8.26 6.10 6.35 6.60 22.61 22.80 22.99 3.18 3.30 3.43 0.20 0.29 0.38 1.14 1.46 1.78 0.36 0.46 0.56 7.87 9.40 10. 2004 Microchip Technology Inc. ...
Page 161
... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-013 Drawing No. C04-051 2004 Microchip Technology Inc Units INCHES* ...
Page 162
... B .009 - .015 A2 MILLIMETERS* MIN NOM MAX 20 0. 2.00 1.65 1.75 1.85 0. 7.40 7.80 8.20 5.00 5.30 5.60 .295 7.20 7.50 0.55 0.75 0.95 0.09 - 0.25 0° 4° 8° 0.22 - 0.38 Revised 11/03/03 2004 Microchip Technology Inc. ...
Page 163
... Overall Height Standoff Contact Thickness Overall Width Exposed Pad Width Overall Length Exposed Pad Length Contact Width Contact Length *Controlling Parameter Notes: JEDEC equivalent: MO-220 Drawing No. C04-105 2004 Microchip Technology Inc. EXPOSED METAL PAD OPTIONAL SEE DETAIL ALTERNATE INDEX INDEX ...
Page 164
... PIC16F818/819 NOTES: DS39598E-page 162 2004 Microchip Technology Inc. ...
Page 165
... Timer1 specifications and RTC application example. APPENDIX B: DEVICE DIFFERENCES The differences between the devices in this data sheet are listed in Table B-1. TABLE B-1: DIFFERENCES BETWEEN THE PIC16F818 AND PIC16F819 Features Flash Program Memory (14-bit words) Data Memory (bytes) EEPROM Data Memory (bytes) ...
Page 166
... PIC16F818/819 NOTES: DS39598E-page 164 2004 Microchip Technology Inc. ...
Page 167
... RA4/AN4/T0CKI Pin ................................................... 40 RA5/MCLR/V Pin ................................................... 41 PP RA6/OSC2/CLKO Pin ................................................ 41 RA7/OSC1/CLKI Pin .................................................. 42 RB0 Pin ...................................................................... 45 RB1 Pin ...................................................................... 46 RB2 Pin ...................................................................... 47 RB3 Pin ...................................................................... 48 RB4 Pin ...................................................................... 49 2004 Microchip Technology Inc. PIC16F818/819 RB5 Pin ..................................................................... 50 RB6 Pin ..................................................................... 51 RB7 Pin ..................................................................... 52 Recommended MCLR Circuit .................................... 92 2 SSP Mode ........................................................ 76 SSP in SPI Mode ....................................................... 74 System Clock ............................................................. 38 Timer0/WDT Prescaler ...
Page 168
... BTFSC ..................................................................... 106 BTFSS ..................................................................... 106 CALL ........................................................................ 106 CLRF ....................................................................... 106 CLRW ...................................................................... 106 CLRWDT ................................................................. 106 COMF ...................................................................... 107 DECF ....................................................................... 107 DECFSZ .................................................................. 107 Descriptions ............................................................. 105 GOTO ...................................................................... 107 INCF ........................................................................ 107 INCFSZ .................................................................... 107 IORLW ..................................................................... 108 IORWF ..................................................................... 108 MOVF ...................................................................... 108 MOVLW ................................................................... 108 MOVWF ................................................................... 108 2004 Microchip Technology Inc. ...
Page 169
... MPLAB ICD 2 In-Circuit Debugger ................................... 113 MPLAB ICE 2000 High-Performance Universal In-Circuit Emulator ................................... 113 MPLAB ICE 4000 High-Performance Universal In-Circuit Emulator ................................... 113 2004 Microchip Technology Inc. PIC16F818/819 MPLAB Integrated Development Environment Software ............................................. 111 MPLAB PM3 Device Programmer ................................... 113 MPLINK Object Linker/ MPLIB Object Librarian ...
Page 170
... RB5/SS Pin .......................................................................... 8 RB6/T1OSO/T1CKI/PGC Pin ............................................... 8 RB7/T1OSI/PGD Pin ............................................................ 8 RBIF Bit .............................................................................. 43 RCIO Oscillator Mode ........................................................ 35 Receive Overflow Indicator Bit, SSPOV ............................. 73 Register File Map PIC16F818 ................................................................. 11 PIC16F819 ................................................................. 12 DS39598E-page 168 Registers ADCON0 (A/D Control 0) ........................................... 81 ADCON1 (A/D Control 1) ........................................... 82 CCP1CON (Capture/Compare/ PWM Control 1) ................................................. 65 Configuration Word .................................................... 90 EECON1 (Data EEPROM Access Control 1) ...
Page 171
... Associated Registers ................................................. 64 Output ........................................................................ 63 Postscaler .................................................................. 63 Prescaler .................................................................... 63 Prescaler and Postscaler ........................................... 63 Timing Diagrams A/D Conversion ........................................................ 142 Brown-out Reset ...................................................... 133 Capture/Compare/PWM (CCP1) .............................. 135 CLKO and I/O .......................................................... 132 External Clock .......................................................... 131 2004 Microchip Technology Inc. PIC16F818/819 Bus Data ............................................................ 139 Bus Start/Stop Bits ............................................ 138 Reception (7-Bit Address) ................................... 78 ...
Page 172
... PIC16F818/819 NOTES: DS39598E-page 170 2004 Microchip Technology Inc. ...
Page 173
... Microchip Products • Conferences for products, Development Systems, technical information and more • Listing of seminars and events 2004 Microchip Technology Inc. SYSTEMS INFORMATION AND UPGRADE HOT LINE The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip’ ...
Page 174
... What deletions from the document could be made without affecting the overall usefulness there any incorrect or misleading information (what and where)? 7. How would you improve this document? DS39598E-page 172 Total Pages Sent ________ FAX: (______) _________ - _________ N Literature Number: DS39598E 2004 Microchip Technology Inc. ...
Page 175
... SO = SOIC SS = SSOP ML = QFN Pattern QTP, SQTP, ROM Code (factory specified) or Special Requirements. Blank for OTP and Windowed devices. 2004 Microchip Technology Inc. XXX Examples: Pattern a) PIC16LF818-I/P = Industrial temp., PDIP package, Extended V b) PIC16F818-I/SO = Industrial temp., SOIC package, normal V range DD range ...
Page 176
... Fax: 65-6334-8850 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Taiwan - Hsinchu Tel: 886-3-572-9526 Fax: 886-3-572-6459 2004 Microchip Technology Inc. EUROPE Austria - Weis Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Ballerup Tel: 45-4420-9895 Fax: 45-4420-9910 France - Massy Tel: 33-1-69-53-63-20 ...