PIC16F627-04/SO Microchip Technology Inc., PIC16F627-04/SO Datasheet - Page 64

• Manufacturer Part Number: PIC16F627-04/SO
• Description: 18 PIN, 1.75 KB FLASH, 224 RAM, 16 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F627-04/SO

• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 128 Bytes
• Input Output: 16
• Interface: SCI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin SOIC
• Programmable Memory: 1.75K Bytes
• Ram Size: 224 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F62X
11.1
In Capture mode, CCPR1H:CCPR1L captures the
16-bit value of the TMR1 register when an event occurs
on pin RB3/CCP1. An event is defined as:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
An event is selected by control bits CCP1M3:CCP1M0
(CCP1CON<3:0>). When a capture is made, the Inter-
rupt Request Flag bit CCP1IF (PIR1<2>) is set. It must
be cleared in software. If another capture occurs before
the value in register CCPR1 is read, the old captured
value will be lost.
11.1.1
In Capture mode, the RB3/CCP1 pin should be
configured as an input by setting the TRISB<3> bit.
TABLE 11-2:
11.1.2
Timer1 must be running in Timer mode or Synchro-
nized Counter mode for the CCP module to use the
capture feature. In Asynchronous Counter mode, the
capture operation may not work.
11.1.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep bit
CCP1IE (PIE1<2>) clear to avoid false interrupts and
should clear the flag bit CCP1IF following any such
change in Operating mode.
11.1.4
There are four prescaler settings, specified by bits
CCP1M3:CCP1M0. Whenever the CCP module is
turned off, or the CCP module is not in Capture mode,
the prescaler counter is cleared. This means that any
RESET will clear the prescaler counter.
DS40300C-page 62
RB3/CCP1
Pin
Note:
Capture Mode
If the RB3/CCP1 is configured as an out-
put, a write to the port can cause a capture
condition.
edge detect
CCP PIN CONFIGURATION
TIMER1 MODE SELECTION
SOFTWARE INTERRUPT
CCP PRESCALER
Q’s
Prescaler
³ 1, 4, 16
and
CCP1CON<3:0>
CAPTURE MODE OPERATION
BLOCK DIAGRAM
Set flag bit CCP1IF
(PIR1<2>)
Capture
Enable
CCPR1H
TMR1H
CCPR1L
TMR1L
Preliminary
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared, therefore the first capture may be from
a non-zero prescaler. Example 11-1 shows the
recommended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 11-1:
CLRF
MOVLW
MOVWF
11.2
In Compare mode, the 16-bit CCPR1 register value is
constantly compared against the TMR1 register pair
value. When a match occurs, the RB3/CCP1 pin is:
• Driven High
• Driven Low
• Remains Unchanged
The action on the pin is based on the value of control
bits CCP1M3:CCP1M0 (CCP1CON<3:0>). At the
same time, interrupt flag bit CCP1IF is set.
FIGURE 11-1:
11.2.1
The user must configure the RB3/CCP1 pin as an
output by clearing the TRISB<3> bit.
RB3/CCP1
Pin
Note:
Special Event Trigger will reset Timer1, but not set
interrupt flag bit TMR1IF (PIR1<0>)
Output Enable
TRISB<3>
CCP1CON
NEW_CAPT_PS
CCP1CON
Compare Mode
Clearing the CCP1CON register will force
the RB3/CCP1 compare output latch to the
default low level. This is not the data latch.
CCP PIN CONFIGURATION
Q
R
S
CCP1CON<3:0>
Mode Select
Output
CHANGING BETWEEN
CAPTURE PRESCALERS
COMPARE MODE
OPERATION BLOCK
DIAGRAM
Logic
 2003 Microchip Technology Inc.
;Turn CCP module off
;Load the W reg with
; the new prescaler
; mode value and CCP ON
;Load CCP1CON with this
; value
(PIR1<2>)
Set flag bit CCP1IF
match
CCPR1H CCPR1L
TMR1H
Comparator
TMR1L