LT6300IGN#PBF Linear Technology, LT6300IGN#PBF Datasheet - Page 8

• Manufacturer Part Number: LT6300IGN#PBF
• Description: IC XDSL LINE DRIVER 16-SSOP
• Manufacturer: Linear Technology
• Type: Line Driver, Transmitterr

Specifications of LT6300IGN#PBF

• Number Of Drivers/receivers: 2/0
• Protocol: xDSL
• Voltage - Supply: 5 V ~ 12 V
• Mounting Type: Surface Mount
• Package / Case: 16-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIO S I FOR ATIO
LT6300
8
Logic Controlled Operating Current
The DSP controller in a typical xDSL application can have
I/O pins assigned to provide logic control of the LT6300
line driver operating current. As shown in Figure 4 one or
two logic control inputs can control two or four different
operating modes. The logic inputs add or subtract current
to the SHDN input to set the operating current. The one
logic input example selects the supply current to be either
full power, 10mA per amplifier or just 2mA per amplifier,
which significantly reduces the driver power consumption
U
U
45
40
35
30
25
20
15
10
5
0
Two Control Inputs
One Control Input
4
V
V
H
H
L
L
C1
S
= 12V
Figure 4. Providing Logic Input Control of Operating Current
7
V
V
R
R
W
LOGIC
LOGIC
R
R
V
SHDN
SHDN
R
V
H
H
H
CO
L
L
L
C1
C0
C
C
10
RESISTOR VALUES (k )
R
SUPPLY CURRENT PER AMPLIFIER (mA)
RESISTOR VALUES (k )
R
SUPPLY CURRENT PER AMPLIFIER (mA)
40.2
11.5
19.1
40.2
7.32
Figure 3. R
SHDN
SHDN
3V
10
3V
10
30
7
5
2
2
TO V
TO V
50
3.3V
3.3V
43.2
13.0
22.1
43.2
8.25
10
10
7
5
2
2
U
CC
CC
70
(12V)
(12V)
60.4
21.5
36.5
60.4
13.7
5V
10
5V
10
BIAS
7
5
2
2
90
4.99
8.66
14.3
4.99
5.49
to Ground Current Control
R
R
3V
3V
10
10
R
100
7
5
2
2
SHDN
SHDN
BIAS
V
+
130
3.3V
6.81
10.7
17.8
3.3V
6.81
6.65
(k )
TO V
TO V
= 12V
10
10
7
5
2
2
while maintaining less than 2
frequencies less than 1MHz. This low power mode retains
termination impedance at the amplifier outputs and the
line driving back termination resistors. With this termina-
tion, while a DSL port is not transmitting data, it can still
sense a received signal from the line across the back-
termination resistors and respond accordingly.
The two logic input control provides two intermediate
(approximately 7mA per amplifier and 5mA per amplifier)
operating levels between full power and termination
R
SHDN
SHDNREF
BIAS
150
LOGIC
LOGIC
I
R
19.6
20.5
34.0
19.6
12.7
S
5V
5V
6300
BIAS
10
10
7
5
2
2
PER AMPLIFIER (mA)
170
F04
=
I
S
0V
0V
PER AMPLIFIER (mA)
190
V
V
V
LOGIC
LOGIC
V
V
+
210
V
C1
C0
– 1.2V
C
230
R
R
R
R
C1
C0
V
C
BIAS
+
250
12V OR V
12V OR V
– 1.2V
• 64 – 5k
+ 5k
270 290
6300 F03
• 64
R
2k
R
2k
LOGIC
LOGIC
SHDN
SHDNREF
SHDN
SHDNREF
SHDN
SHDN
output impedance to