PIC18F4550-I/ML Microchip Technology Inc., PIC18F4550-I/ML Datasheet - Page 242
PIC18F4550-I/ML
Manufacturer Part Number
PIC18F4550-I/ML
Description
44 PIN, 32 KB FLASH, 2048 RAM, FS-USB 2.0
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F4550-IML.pdf
(320 pages)
Specifications of PIC18F4550-I/ML
A/d Inputs
13-Channel, 10-Bit
Comparators
2
Cpu Speed
12 MIPS
Eeprom Memory
256 Bytes
Input Output
34
Interface
I2C/SPI/UART/USART/USB
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin QFN
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Speed
48 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC18F2450/4450
POP
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39760A-page 240
Q Cycle Activity:
Before Instruction
After Instruction
Decode
TOS
Stack (1 level down)
TOS
PC
Q1
operation
Pop Top of Return Stack
POP
None
(TOS)
None
The TOS value is pulled off the return
stack and is discarded. The TOS value
then becomes the previous value that
was pushed onto the return stack.
This instruction is provided to enable
the user to properly manage the return
stack to incorporate a software stack.
1
1
POP
GOTO
0000
No
Q2
bit bucket
0000
NEW
Pop TOS
=
=
=
=
value
Q3
0031A2h
014332h
014332h
NEW
0000
Advance Information
operation
No
Q4
0110
PUSH
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
TOS
PC
PC
TOS
Stack (1 level down)
Q1
Push PC + 2
onto return
Push Top of Return Stack
PUSH
None
(PC + 2)
None
The PC + 2 is pushed onto the top of
the return stack. The previous TOS
value is pushed down on the stack.
This instruction allows implementing a
software stack by modifying TOS and
then pushing it onto the return stack.
1
1
PUSH
stack
0000
Q2
© 2006 Microchip Technology Inc.
TOS
0000
operation
=
=
=
=
=
No
Q3
345Ah
0124h
0126h
0126h
345Ah
0000
operation
No
Q4
0101
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