ATA6824-PHQW Atmel, ATA6824-PHQW Datasheet - Page 9

• Manufacturer Part Number: ATA6824-PHQW
• Description: Motor / Motion / Ignition Controllers & Drivers Gate Driver IC high Temp
• Manufacturer: Atmel
• Type: Half Bridge DC Motor Driverr

Specifications of ATA6824-PHQW

• Mounting Style: SMD/SMT
• Package / Case: QFN-32
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.4
5.4.1
5.4.2
Figure 5-5.
4931L–AUTO–02/11
High Voltage Serial Interface
(input to transmitting Node)
(output of receiving Node 1)
(output of receiving Node 2)
TX
RX
RX
V
(Transceiver
supply
of transmitting
node)
Transmit Mode
Reset Mode
S
Definition of Bus Timing Parameters
TH
TH
TH
TH
Rec(max)
Dom(max)
Rec(min)
Dom(min)
A bi-directional bus interface is implemented for data transfer between hostcontroller and the
local microcontroller (SIO).
The transceiver consists of a low side driver (1.2V at 40mA) with slew rate control, wave shap-
ing, current limitation, and a high-voltage comparator followed by a debouncing unit in the
receiver.
During transmission, the data at the pin TX will be transferred to the bus driver to generate a
bus signal on pin SIO. The pin TX has a pull-down resistor included.
To minimize the electromagnetic emission of the bus line, the bus driver has an integrated
slew rate control and wave-shaping unit. In transmit mode, transmission will be interrupted in
case of overheating at the SIO driver.
In case of an active reset shown at pin /RESET the pin SIO is switched to low, independent of
the temperature. The maximum current is limited to I
The recessive BUS level is generated from the integrated 30k pull-up resistor in series with
an active diode. This diode prevents the reverse current of VBUS during differential voltage
between VSUP and BUS (V
t
Bit
t
rx_pdf(1)
SIO Signal
t
t
SIO_dom(min)
SIO_dom(max)
BUS
> V
SUP
).
t
Bit
t
rx_pdr(2)
t
SIO_rec(min)
t
SIO_rec(max)
t
rx_pdr(1)
SIO_LIM_RESET
t
Bit
Atmel ATA6824
.
Thresholds of
receiving node 1
Thresholds of
receiving node 2
t
rx_pdf(2)
9