CS5462-IS Cirrus Logic Inc, CS5462-IS Datasheet - Page 15

• Manufacturer Part Number: CS5462-IS
• Description: Other Power Management Low-Cost Pwr/Energy w/Pulse Output IC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5462-IS

• Mounting Style: SMD/SMT
• Package / Case: SOIC-8
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

means that E1 and E2 should have an average
pulse output frequency of 2 Hz * 72% = 1.44 Hz
and FOUT should have an average pulse output
frequency of 10 kHz * 72% = 7.2 kHz. Assuming
that FOUT is used for calibration (although the gain
error will be the same for E1 and E2), FOUT should
be measured to find the gain error. Suppose the
measured pulse output frequency is 6.96 6kHz in-
stead of 7. 2kHz. 6.99 6kHz is 96.76% of 7. 2kHz.
This means that the gain error is 96.76% -
100% = -3.24%. This error can be calibrated out by
connecting CAL1 to P2 and CAL0 to P2 (see Fig-
ure 7 for all connection options). This will adjust the
pulse rate frequency by 2.8% + 0.4% = 3.2%
(since the smallest calibration step size is 0.2%,
3.2% is the closest value that can offset the error
of -3.24). After these connections are made the av-
erage pulse output frequency of FOUT, E1, and E2
will have a gain error less than or equal to -0.04%
of full scale.
connected
CAL1
to:
P1
P2
P3
P4
P5
P6
P7
Figure 7. Power-on Reset
+4.8%
+3.4% +3.2%
+2.0% +1.8%
+0.6% +0.4%
-0.8%
-2.2%
-3.6%
P1
+4.6%
-1.0%
-2.4%
-3.8%
P2
CAL0 connected to:
+4.4%
+3.0%
+1.6%
+0.2%
-1.2%
-2.6%
-4.0%
P3
+4.2% +4.0% +3.8%
+2.8% +2.6% +2.4%
+1.4% +1.2% +1.0%
+0.0%
-1.4%
-2.8%
-4.2%
P4
-0.2%
-1.6%
-3.0%
-4.4%
P5
CS5462
-0.4%
-1.8%
-3.2%
-4.6%
P6
+3.6%
+2.2%
+0.8%
-0.6%
-2.0%
-3.4%
-4.8%
P7
15