71M6541F-IGT/F Maxim Integrated Products, 71M6541F-IGT/F Datasheet - Page 91

• Manufacturer Part Number: 71M6541F-IGT/F
• Description: PMIC Solutions Precision Energy Meter IC
• Manufacturer: Maxim Integrated Products
• Type: Metering SoCr

Specifications of 71M6541F-IGT/F

• Core: 8051
• Core Architecture: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 5 KB
• Device Million Instructions Per Second: 5 MIPS
• Interface Type: I2C, ICE, SPI, UART
• Maximum Clock Frequency: 5 MHz
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Programmable I/os: 30
• Number Of Timers: 2
• On-chip Adc: 22 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Package / Case: LQFP-64
• Processor Series: 8051
• Program Memory Size: 64 KB
• Program Memory Type: Flash
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

application, the 32-bit CE sequentially processes the samples from the voltage inputs on pins IA, VA,
IB, etc., performing calculations to measure active power (Wh), reactive power (VARh), A
•
•
•
•
These interrupts are connected to the MPU interrupt service inputs as external interrupts. CE_BUSY
indicates that the CE is actively processing data. This signal occurs once every multiplexer cycle (typically
396 µs), and indicates that the CE has updated status information in its CESTATUS register (CE RAM 0x80).
XFER_BUSY indicates that the CE is updating data to the output region of the RAM. This indication
occurs whenever the CE has finished generating a sum by completing an accumulation interval
determined by SUM_SAMPS[12:0], I/O RAM 0x2107[4:0], 2108[7:0], (typically every 1000 ms). Interrupts to
the MPU occur on the falling edges of the XFER_BUSY and CE_BUSY signals.
WPULSE and VPULSE are typically used to signal energy accumulation of real (Wh) and reactive (VARh)
energy. Tying WPULSE and VPULSE into the MPU interrupt system can support pulse counting.
XPULSE and YPULSE can be used to signal events such as sags and zero crossings of the mains voltage
to the MPU. Tying these outputs into the MPU interrupt system relieves the MPU from having to read the
CESTATUS register at every occurrence of the CE_BUSY interrupt in order to detect sag or zero crossing
events.
Refer to
firmware.
3.5
The data flow between the Compute Engine (CE) and the MPU is shown in
for four-quadrant metering. These measurements are then accessed by the MPU, processed further and
output using the peripheral devices available to the MPU.
Both the CE and multiplexer are controlled by the MPU via shared registers in the I/O RAM and in RAM.
The CE outputs a total of six discrete signals to the MPU. These consist of four pulses and two interrupts:
v1.1
CE_BUSY
XFER_BUSY
WPULSE, VPULSE (pulses for active and reactive energy)
XPULSE, YPULSE (auxiliary pulses)
Data Flow and MPU/CE Communication
MUX
5.3 CE Interface Description
Samples
© 2008–2011 Teridian Semiconductor Corporation
CE
I/O RAM (Configuration RAM)
Figure 30: MPU/CE Data Flow
for additional information on setting up the device using the MPU
Pulses
CECONFIG
CESTATUS
XRAM
Control
XFER_BUSY
WPULSE
CE_BUSY
XPULSE
YPULSE
VPULSE
MPU
Figure
Interrupts
30. In a typical
2
h, and V
Processed
Metering
Data
2
h
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