71M6542F-IGT/F Maxim Integrated Products, 71M6542F-IGT/F Datasheet - Page 47

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71M6542F-IGT/F

Manufacturer Part Number
71M6542F-IGT/F
Description
PMIC Solutions Precision Energy Meter IC
Manufacturer
Maxim Integrated Products
Type
Metering SoCr
Datasheet

Specifications of 71M6542F-IGT/F

Core
8051
Core Architecture
8051
Data Bus Width
8 bit
Data Ram Size
5 KB
Device Million Instructions Per Second
5 MIPS
Interface Type
I2C, ICE, SPI, UART
Maximum Clock Frequency
5 MHz
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Programmable I/os
51
Number Of Timers
2
On-chip Adc
22 bit
Operating Supply Voltage
3 V to 3.6 V
Package / Case
LQFP-100
Processor Series
8051
Program Memory Size
64 KB
Program Memory Type
Flash
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
71M6542F-IGT/F
Manufacturer:
AD
Quantity:
1 500
V1.1
N o .
“Internal Source” refers to interrupt sources originating within the 80515 MPU core.
“External Source” refers to interrupt sources outside the 80515 MPU core originating from other parts of the 71M654x SoC.
0
2
1
3
4
5
6
XFER_BUSY
W P U L S E
X P U L S E
Y P U L S E
CE_BUSY
V P U L S E
EEPROM
E x t e r n a l
RTC_1M
RTC_1S
S o u r c e
VSTAT
RTC_T
D I O
D I O
SPI
C E d e t e c t e d z e r o
C E d e t e c t e d s a g
c y c l e c o m p l e t e d
V A R h p u l s e
a c c u m u l a t i o n
e v e r y s e c o n d
e v e r y m i n u t e
a l a r m c l o c k
W h p u l s e
c o m m a n d
D I O s t a t u s
D I O s t a t u s
r e c e i v e d
( o p t i c a l )
c r o s s i n g
C E c o m p l e t e d c o d e r u n a n d
B U S Y f e l l
h a s n e w s t a t u s i n f o r m a t i o n
I n t e r n a l
U A R T 1
c h a n g e d
c h a n g e d
S o u r c e
Timer 0
Timer 1
U A R T 0
S u p p l y s t a t u s c h a n g e d
o v e r f l o w o c c u r r e d
o v e r f l o w o c c u r r e d
b y t e t r a n s m i t t e d
b y t e t r a n s m i t t e d
b y t e r e c e i v e d
b y t e r e c e i v e d
E n a b l e B i t s
EX_WPULSE
EX_XPULSE
EX_YPULSE
EX_VPULSE
I n d i v i d u a l
EX_RTC1M
EX_RTC1S
D I O _ R n
D I O _ R n
EX_XFER
EX_RTCT
EX_EEX
EX_SPI
© 2008–2011 Teridian Semiconductor Corporation
S 1 C O N . 0 ( R I 1 )
S 0 C O N . 0 ( R I 0 )
S 1 C O N . 1 ( T I 1 )
S 0 C O N . 0 ( T I 0 )
I n d i v i d u a l F l a g s
T C O N . 5 ( T F 0 )
T C O N . 7 ( T F 1 )
T C O N . 1 ( I E 0 )
T C O N . 3 ( I E 1 )
Figure 16: Interrupt Structure
IE_WPULSE
IE_XPULSE
IE_YPULSE
IE_VPULSE
IE_RTC1M
IE_RTC1S
IE_XFER
IE_RTCT
IE_EEX
IE_SPI
L o g i c a n d P o l a r i t y
> = 1
> = 1
> = 1
> = 1
> = 1
S e l e c t i o n
I 2 F R
I 3 F R
I T 0
h a s o c c u r r e d
b e e n c l e a r e d
a n d h a s n o t
a n i n t e r r u p t
m e a n s t h a t
I n t e r r u p t
IRCON.1
IRCON.2
IRCON.3
IRCON.4
IRCON.5
(IEX2)
(IEX3)
(IEX4)
(IEX5)
(IEX6)
F l a g = 1
F l a g s
h a r d w a r e v e c t o r s t o t h e
E X 0 – E X 6 a r e c l e a r e d
a u t o m a t i c a l l y w h e n t h e
I E N 0 . 7
( E A L )
I n t e r r u p t E n a b l e
i n t e r r u p t h a n d l e r
I E N 0 . 0
I E N 2 . 0
I E N 0 . 1
I E N 1 . 1
I E N 0 . 2
I E N 1 . 2
I E N 0 . 3
I E N 1 . 3
I E N 0 . 4
I E N 1 . 4
I E N 1 . 5
( E X 0 )
( E S 1 )
( E T 0 )
( E X 2 )
( E X 1 )
( E X 3 )
( E T 1 )
( E X 4 )
( E S 0 )
( E X 5 )
( E X 6 )
I P 1 . 0 /
I P 1 . 2 /
A s s i g n m e n t
I P 0 . 0
I P 1 . 1 /
I P 0 . 2
I P 1 . 3 /
I P 1 . 4 /
I P 1 . 5 /
I P 0 . 1
I P 0 . 3
I P 0 . 4
I P 0 . 5
P r i o r i t y
I n t e r r u p t
V e c t o r
3 / 1 9 / 2 0 1 0
47

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